[{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div><span style=\"font-size: 16px;\">At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</span></div>","categories":{"commitment":"Full-time","department":"Software","location":"Palo Alto, CA","team":"AI Engineering","allLocations":["Palo Alto, CA"]},"createdAt":1759349152573,"descriptionPlain":"Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n","description":"<div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div>","id":"b04a2bff-a3e5-46e5-abe8-81dcfb9612e1","lists":[{"text":"The AI Engineering team","content":"\n<li>Builds software pipelines that adapt neural networks (such as Hugging Face, Ultralytics, or custom models) for deployment on Mythic’s hardware.</li>\n<li>Develops advanced quantization-aware and analog-aware retraining algorithms leveraging PyTorch and ONNX.</li>\n<li>Hardens networks to analog effects via advanced network regularization.</li>\n<li>Models analog effects and their impact on network performance.</li>\n<li>Works cross-functionally to validate and debug hardware.</li>\n<li>Contributes to the co-design of next-generation hardware.</li>\n<li>Brings up and customizes neural networks.</li>\n"},{"text":"Here's what you will do","content":"\n<li>Optimize Mythic’s analog-aware software toolchain for network accuracy, latency, and ease-of-use.</li>\n<li>Design algorithms and tools for Mythic’s neural network conversion pipeline.</li>\n<li>Build high-fidelity, computationally-efficient hardware models.</li>\n<li>Contribute to silicon bring-up, debugging, and validation.</li>\n<li>Improve software through refactoring, testing, documentation, and other engineering best practices.</li>\n<li>Stay current with advances in deep learning research and neural network frameworks.</li>\n"},{"text":"Here's the background you need to have","content":"\n<li>Bachelor's degree in Computer Science, Mathematics, or a related field.</li>\n<li>5+ years of software experience in a production environment.</li>\n<li>Experience working on complex problems with algorithm-heavy code.</li>\n<li>Commitment to quality and engineering excellence.</li>\n<li>Strong communication skills.</li>\n"},{"text":"The following would be nice to have","content":"\n<li>MS/PhD in Computer Science, Mathematics, or related field.</li>\n<li>Hands-on experience with modern neural network frameworks.</li>\n<li>Familiarity with state-of-the-art neural network architectures.</li>\n<li>Experience training neural networks with hardware-aware techniques, including quantization, pruning, or model-size limitations.</li>\n<li>Experience with MLOps practices, including model versioning, CI/CD pipelines for ML, model deployment, and monitoring.</li>\n<li>Experience owning critical APIs with a large user base.</li>\n<li>Contributions to open-source software.</li>\n"}],"text":"AI Algorithms/Software Engineer","country":"US","workplaceType":"remote","opening":"","openingPlain":"","descriptionBody":"<div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100&times; the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications&mdash;whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from &ndash;40 &deg;C to +125 &deg;C, making it ideal for industrial, automotive, aerospace, and defense. We&rsquo;ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div>","descriptionBodyPlain":"Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/b04a2bff-a3e5-46e5-abe8-81dcfb9612e1","applyUrl":"https://jobs.lever.co/mythic-ai.com/b04a2bff-a3e5-46e5-abe8-81dcfb9612e1/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire&nbsp;smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Digital Design","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1756909224186,"descriptionPlain":"We’re hiring experienced Architecture Modeling Engineers from junior to senior levels to play a key role in developing the designs that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nArchitecture Modeling at Mythic:\nAt Mythic, architecture modeling is at the core of how we design and deliver breakthrough AI hardware. Our models allow us to quantify the real-world performance of new architectures—capturing critical tradeoffs in throughput, latency, and efficiency—before a single chip is built.\n \nModeling plays a central role in active design development, predicting how AI workloads generated by the Mythic compiler will run on silicon. These models serve as a golden reference for verifying RTL implementations and enable our software teams to begin developing validation and customer-facing code long before hardware is available.\n \nEven after silicon arrives, our modeling tools remain invaluable, offering deeper insight into performance bottlenecks and guiding ongoing software optimization.\n","description":"<div>We’re hiring experienced Architecture Modeling Engineers from junior to senior levels to play a key role in developing the designs that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100× the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We’ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000–$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">Architecture Modeling at Mythic:</strong></div>\n<div>At Mythic, architecture modeling is at the core of how we design and deliver breakthrough AI hardware. Our models allow us to quantify the real-world performance of new architectures—capturing critical tradeoffs in <strong>throughput, latency, and efficiency</strong>—before a single chip is built.</div>\n<div>&nbsp;</div>\n<div>Modeling plays a central role in active design development, predicting how AI workloads generated by the Mythic compiler will run on silicon. These models serve as a <strong>golden reference</strong> for verifying RTL implementations and enable our software teams to begin developing validation and customer-facing code long before hardware is available.</div>\n<div>&nbsp;</div>\n<div>Even after silicon arrives, our modeling tools remain invaluable, offering deeper insight into performance bottlenecks and guiding ongoing software optimization.</div>","id":"28b62290-688c-44f4-b4db-008af6607533","lists":[{"text":"Responsibilities","content":"\n<li>Architect and create various types of hardware models with varying goals - e.g. transaction-level, cycle-accurate.</li>\n<li>Create or build on top of existing hardware models to simulate functionality of custom AI software.</li>\n<li>Create prototyping models for estimating power, performance and area of new chip architectures.</li>\n<li>Create cycle-accurate models of the hardware (C++/SystemC).</li>\n<li>Collaborate with peer engineering teams to co-design and co-verify the hardware implementation.</li>\n<li>Investigate new architectural ideas, many co-designed with other system components.</li>\n"},{"text":"Requirements","content":"\n<li>Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.</li>\n<li>5+ years experience required creating performance models for architectural investigations. This experience can include time spent in academic work including papers, thesis, and dissertation work.&nbsp;The years required can be reduced if prior modeling experience is related to systems for AI.</li>\n<li>Academic and working knowledge of a variety of hardware concepts such as CPUs, memory systems, bus interconnects, security, chip interfaces, etc.</li>\n<li>Proficiency and experience with C++/SystemC as used in modeling.</li>\n<li>Proficiency and experience&nbsp;with hardware modeling for performance and/or power.</li>\n<li>Strong communication skills, both written and spoken.</li>\n"}],"text":"Architecture Modeling Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>We&rsquo;re hiring experienced Architecture Modeling Engineers from junior to senior levels to play a key role in developing the designs that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100&times; the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from &ndash;40 &deg;C to +125 &deg;C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We&rsquo;ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000&ndash;$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">Architecture Modeling at Mythic:</strong></div>\n<div>At Mythic, architecture modeling is at the core of how we design and deliver breakthrough AI hardware. Our models allow us to quantify the real-world performance of new architectures&mdash;capturing critical tradeoffs in <strong>throughput, latency, and efficiency</strong>&mdash;before a single chip is built.</div>\n<div>&nbsp;</div>\n<div>Modeling plays a central role in active design development, predicting how AI workloads generated by the Mythic compiler will run on silicon. These models serve as a <strong>golden reference</strong> for verifying RTL implementations and enable our software teams to begin developing validation and customer-facing code long before hardware is available.</div>\n<div>&nbsp;</div>\n<div>Even after silicon arrives, our modeling tools remain invaluable, offering deeper insight into performance bottlenecks and guiding ongoing software optimization.</div>","descriptionBodyPlain":"We’re hiring experienced Architecture Modeling Engineers from junior to senior levels to play a key role in developing the designs that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nArchitecture Modeling at Mythic:\nAt Mythic, architecture modeling is at the core of how we design and deliver breakthrough AI hardware. Our models allow us to quantify the real-world performance of new architectures—capturing critical tradeoffs in throughput, latency, and efficiency—before a single chip is built.\n \nModeling plays a central role in active design development, predicting how AI workloads generated by the Mythic compiler will run on silicon. These models serve as a golden reference for verifying RTL implementations and enable our software teams to begin developing validation and customer-facing code long before hardware is available.\n \nEven after silicon arrives, our modeling tools remain invaluable, offering deeper insight into performance bottlenecks and guiding ongoing software optimization.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/28b62290-688c-44f4-b4db-008af6607533","applyUrl":"https://jobs.lever.co/mythic-ai.com/28b62290-688c-44f4-b4db-008af6607533/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div><span style=\"font-size: 16px;\">At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</span></div>","categories":{"commitment":"Full-time","department":"Software","location":"Palo Alto, CA","team":"Compiler","allLocations":["Palo Alto, CA","Austin, TX","Vancouver, BC","Remote"]},"createdAt":1759452685461,"descriptionPlain":"About us\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nAbout the role\nHelp push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.\n","description":"<div><b>About us</b></div><div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div><div><br></div><div><b>About the role</b></div><div>Help push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.</div>","id":"0cfba177-a646-48da-9ced-4c33ea1c108a","lists":[{"text":"Here's what you will do","content":"<li>Extend compiler IRs to represent algorithms not easily captured in DNN graphs including control flow and iterative computation</li><li>Develop compilation strategies that unify analog compute with digital subsystems while maintaining performance and correctness</li><li>Prototype and optimize algorithms with irregular or dynamic control flow in compiler IRs, applying techniques such as vectorization, predication, and scheduling</li><li>Collaborate with hardware engineers to co-design ISA and features that improve support for algorithmic workloads</li><li>Define a roadmap for higher-level programming abstractions that simplify prototyping and accelerate deployment</li>"},{"text":"Here's the background we hope you will have","content":"<li>3+ years of professional experience in compilers or high-performance systems software</li><li>Proficiency in modern C++ (C++14/17/20) and Python</li><li>Familiarity with compiler IRs (e.g., MLIR, LLVM, or equivalent) and their use representing complex program structures</li><li>Solid foundation in program analysis and optimization techniques (e.g., SSA form, loop optimizations, vectorization)</li>"},{"text":"The following would be nice to have, but is not required","content":"<li>Hands-on experience developing MLIR or LLVM dialects for control flow (e.g. scf, cf) or affine/polyhedral representations.</li><li>Background in compiler-hardware co-design: working with hardware designers to refine ISA or execution models for efficiency</li><li>Proven ability to prototype irregular or control-flow algorithms in compiler IRs and optimize them for performance and resource constraints</li><li>Experience extending ML compiler stacks (ONNX, IREE, XLA, PyTorch, TVM) to support workloads beyond DNNs</li>"},{"text":"What we offer","content":"<li>The opportunity to make algorithmic and control-flow-heavy workloads practical on novel accelerator hardware.</li><li>A role that bridges compiler design and hardware co-design, shaping both the IR and the accelerator architecture.</li><li>A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design.</li><li>Competitive compensation, equity, and benefits package.</li>"}],"text":"Compiler Engineer - Algorithmic Workloads Compilation","country":"US","workplaceType":"remote","opening":"","openingPlain":"","descriptionBody":"<div><b>About us</b></div><div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div><div><br></div><div><b>About the role</b></div><div>Help push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.</div>","descriptionBodyPlain":"About us\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nAbout the role\nHelp push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/0cfba177-a646-48da-9ced-4c33ea1c108a","applyUrl":"https://jobs.lever.co/mythic-ai.com/0cfba177-a646-48da-9ced-4c33ea1c108a/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div><span style=\"font-size: 16px;\">At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</span></div>","categories":{"commitment":"Full-time","department":"Software","location":"Palo Alto, CA","team":"Compiler","allLocations":["Palo Alto, CA","Austin, TX","Remote","Vancouver, BC"]},"createdAt":1759451436886,"descriptionPlain":"About us\n\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nAbout the role\n\nJoin us in building the next generation of AI compilers. You’ll play a key role in developing the compiler for our novel AI accelerator, working side-by-side with hardware engineers and ML researchers. Your work will shape how deep learning workloads run on cutting-edge dataflow hardware—defining the instruction set, execution model, and developer experience. The result: a compiler that delivers breakthrough performance while remaining seamless and intuitive for ML developers.\n","description":"<div><b style=\"font-size: 16px;\">About us</b></div><div><br></div><div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div><div><br></div><div><b style=\"font-size: 16px;\">About the role</b></div><div><br></div><div>Join us in building the next generation of AI compilers. You’ll play a key role in developing the compiler for our novel AI accelerator, working side-by-side with hardware engineers and ML researchers. Your work will shape how deep learning workloads run on cutting-edge dataflow hardware—defining the instruction set, execution model, and developer experience. The result: a compiler that delivers breakthrough performance while remaining seamless and intuitive for ML developers.</div>","id":"e820511b-5aeb-462c-92ac-ee71afe24d56","lists":[{"text":"Here's what you will do","content":"<li>Contribute across the full compiler stack, including operator lowering, graph/IR transformations, optimization passes, and backend code generation</li><li>Optimize for dataflow architectures, developing pipelined schedules, memory orchestration, and resource-constrained execution strategies</li><li>Collaborate with hardware architects to influence architectural features, ensuring the compiler and hardware evolve together</li><li>Develop compilation strategies that unify our analog compute with digital subsystems</li><li>Build and maintain a compiler that produces high-performance binaries with strong debugging support, clear error messages, and predictable performance models</li>"},{"text":"Here's the background we hope you will have","content":"<li>3+ years of experience building compilers or high-performance systems software, especially those involving complex resource management or optimization. </li><li>Expert in modern C++ (C++14/17/20) and strong Python.</li><li>Experience with compiler IRs (SSA-based or graph-based), transformations, and code generation</li><li>Exposure to specialized accelerators (GPU, NPU, FPGA, or custom ASIC) or parallel architectures</li>"},{"text":"The following would be nice to have, but is not required","content":"<li>Experience with machine learning compiler stacks (e.g., ONNX, MLIR, TVM, XLA, IREE, PyTorch), with contributions to MLIR or LLVM projects a plus</li><li>Experience with optimization methods (LP/MIP, CP, SAT/SMT) using solvers like Gurobi or OR-Tools for scheduling and resource allocation</li><li>Experience compiling for specialized accelerators (GPU, NPU, FPGA, or custom ASIC) on DNN workloads; GPU/DSP experience is valuable if combined with compiler backend work beyond kernel tuning</li><li>Familiarity with heterogeneous compilation, especially mixing custom accelerators with CPUs/GPUs/NPUs, and exposure to analog or in-memory compute is a plus</li><li>Experience collaborating in compiler–hardware co-design (architecture + ISA) for better compiler usability and hardware efficiency</li>"},{"text":"What we offer ","content":"<li>The opportunity to shape how deep learning and LLM workloads are compiled on novel hardware.</li><li>A role that spans software and hardware co-design, shaping both the compiler and the accelerator architecture</li><li>A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design. We foster an environment of shared learning and technical excellence</li><li>Competitive compensation, equity, and benefits package</li>"}],"text":"Compiler Engineer - Machine Learning Compiler","country":"US","workplaceType":"remote","opening":"","openingPlain":"","descriptionBody":"<div><b style=\"font-size: 16px;\">About us</b></div><div><br></div><div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div><div><br></div><div><b style=\"font-size: 16px;\">About the role</b></div><div><br></div><div>Join us in building the next generation of AI compilers. You’ll play a key role in developing the compiler for our novel AI accelerator, working side-by-side with hardware engineers and ML researchers. Your work will shape how deep learning workloads run on cutting-edge dataflow hardware—defining the instruction set, execution model, and developer experience. The result: a compiler that delivers breakthrough performance while remaining seamless and intuitive for ML developers.</div>","descriptionBodyPlain":"About us\n\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nAbout the role\n\nJoin us in building the next generation of AI compilers. You’ll play a key role in developing the compiler for our novel AI accelerator, working side-by-side with hardware engineers and ML researchers. Your work will shape how deep learning workloads run on cutting-edge dataflow hardware—defining the instruction set, execution model, and developer experience. The result: a compiler that delivers breakthrough performance while remaining seamless and intuitive for ML developers.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/e820511b-5aeb-462c-92ac-ee71afe24d56","applyUrl":"https://jobs.lever.co/mythic-ai.com/e820511b-5aeb-462c-92ac-ee71afe24d56/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div><span style=\"font-size: 16px;\">At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</span></div>","categories":{"commitment":"Full-time","department":"Software","location":"Palo Alto, CA","team":"Compiler","allLocations":["Palo Alto, CA","Austin, TX","Vancouver, BC","Remote"]},"createdAt":1759452143877,"descriptionPlain":"About us\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nAbout the role\nJoin us in advancing the MLIR ecosystem at Mythic. You’ll help extend our existing high-level dialects and design a new hardware-aware low-level dialect, building conversion paths that bridge to our current IRs. Working closely with hardware engineers and ML developers, your work will expand interoperability with PyTorch and other frameworks, laying the groundwork for long-term innovation. The result: an MLIR-based stack that unifies hardware constraints with developer needs and accelerates adoption of modern ecosystems.\n","description":"<div><b>About us</b></div><div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div><div><br></div><div><b>About the role</b></div><div>Join us in advancing the MLIR ecosystem at Mythic. You’ll help extend our existing high-level dialects and design a new hardware-aware low-level dialect, building conversion paths that bridge to our current IRs. Working closely with hardware engineers and ML developers, your work will expand interoperability with PyTorch and other frameworks, laying the groundwork for long-term innovation. The result: an MLIR-based stack that unifies hardware constraints with developer needs and accelerates adoption of modern ecosystems.</div>","id":"d557154b-bb11-44cf-bad2-ae9655bb7188","lists":[{"text":"Here's what you will do","content":"<li>Architect the migration of the existing compiler flow into MLIR, defining dialects, passes, and lowering strategies.</li><li>Build conversion paths between MLIR and Mythic’s custom low-level IR to keep both flows operational during migration.</li><li>Define validation infrastructure within MLIR, including interpretation or execution paths for simulation and debugging.</li><li>Enable compilation by extending MLIR integration across analog accelerators and digital subsystems.</li><li>Leverage Torch-MLIR where PyTorch inputs are available, and guide future integration with PyTorch 2.0 compiler technologies (TorchInductor, TorchDynamo, Torch-MLIR)</li>"},{"text":"Here's the background we hope you will have","content":"<li>3+ years of experience in compiler or high-performance systems development.</li><li>Proficiency in modern C++ (C++14/17/20) and Python.</li><li>Direct, hands-on experience with MLIR, including dialect design, compiler passes, or lowering pipelines.</li><li>Strong understanding of compiler IRs and transformations, with the ability to reason about lowering from high-level ops to hardware-aware representations.</li>"},{"text":"The following would be nice to have, but is not required","content":"<li>Experience architecting complete MLIR flows: from frontend dialects down to hardware-aware dialects, including conversion to and from existing IRs.</li><li>Familiarity with PyTorch compiler technologies, especially Torch-MLIR and integration paths with PyTorch 2.0 (TorchDynamo, TorchInductor).</li><li>Knowledge of dataflow architectures, scheduling, and memory orchestration.</li><li>Background in heterogeneous or specialized accelerators (e.g., analog compute, NPUs, GPUs, DSPs).</li>"},{"text":"What we offer","content":"<li>Shape the MLIR and PyTorch integration strategy for novel AI hardware.</li><li>Opportunity to contribute upstream and influence the broader ML compiler ecosystem.</li><li>Collaborate with a team spanning hardware, runtime, and compiler design.</li><li>Competitive compensation, equity, and comprehensive benefits.</li>"}],"text":"Compiler Engineer – MLIR / PyTorch Infrastructure","country":"US","workplaceType":"remote","opening":"","openingPlain":"","descriptionBody":"<div><b>About us</b></div><div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</div><div><br></div><div><b>About the role</b></div><div>Join us in advancing the MLIR ecosystem at Mythic. You’ll help extend our existing high-level dialects and design a new hardware-aware low-level dialect, building conversion paths that bridge to our current IRs. Working closely with hardware engineers and ML developers, your work will expand interoperability with PyTorch and other frameworks, laying the groundwork for long-term innovation. The result: an MLIR-based stack that unifies hardware constraints with developer needs and accelerates adoption of modern ecosystems.</div>","descriptionBodyPlain":"About us\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nAbout the role\nJoin us in advancing the MLIR ecosystem at Mythic. You’ll help extend our existing high-level dialects and design a new hardware-aware low-level dialect, building conversion paths that bridge to our current IRs. Working closely with hardware engineers and ML developers, your work will expand interoperability with PyTorch and other frameworks, laying the groundwork for long-term innovation. The result: an MLIR-based stack that unifies hardware constraints with developer needs and accelerates adoption of modern ecosystems.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/d557154b-bb11-44cf-bad2-ae9655bb7188","applyUrl":"https://jobs.lever.co/mythic-ai.com/d557154b-bb11-44cf-bad2-ae9655bb7188/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire&nbsp;smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Digital Design","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1758819274206,"descriptionPlain":"We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.\n\nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n\nDesign Verification at Mythic:\nAt Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our custom dataflow architecture that is the backbone of our chip design. DV engineers collaborate with many teams, including RTL design, architecture modeling, custom analog IP, compiler, emulation and post-silicon to ensure the full system operates as intended. Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.\n","description":"<div>We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.</div><div><br></div><div><b style=\"font-size: 18px;\">About Us:</b></div><div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100× the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div><div><br></div><div>The salary range for this position is $120,000–$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div><div><br></div><div><b style=\"font-size: 18px;\">Design Verification at Mythic:</b></div><div>At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our custom dataflow architecture that is the backbone of our chip design. DV engineers collaborate with many teams, including RTL design, architecture modeling, custom analog IP, compiler, emulation and post-silicon to ensure the full system operates as intended. Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.</div>","id":"e7e973ee-a8d7-4985-a28e-bd151527f583","lists":[{"text":"Responsibilities","content":"<li>Hands on system-level and block-level verification.</li><li>Development of test plans and coverage plans.</li><li>Testbench development and execution using UVM or other advanced DV methodologies.</li><li>Creation of verification infrastructure and flows.</li><li>Leverage architecture models and emulation environments to help verify large AI network functionality on the design.</li><li>Further responsibilities will depend on background and skills.</li>"},{"text":"Requirements","content":"<li>Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.</li><li>3+ years of industry experience developing verification testbenches.</li><li>Knowledge of verification methodologies.</li><li>Knowledge of computer architecture.</li><li>Understanding of Verilog, SystemVerilog, and UVM.</li><li>Proven track record of first-pass silicon success.</li><li>Strong communication skills, both written and spoken.</li>"}],"text":"Design Verification Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.</div><div><br></div><div><b style=\"font-size: 18px;\">About Us:</b></div><div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100× the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div><div><br></div><div>The salary range for this position is $120,000–$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div><div><br></div><div><b style=\"font-size: 18px;\">Design Verification at Mythic:</b></div><div>At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our custom dataflow architecture that is the backbone of our chip design. DV engineers collaborate with many teams, including RTL design, architecture modeling, custom analog IP, compiler, emulation and post-silicon to ensure the full system operates as intended. Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.</div>","descriptionBodyPlain":"We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.\n\nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n\nDesign Verification at Mythic:\nAt Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our custom dataflow architecture that is the backbone of our chip design. DV engineers collaborate with many teams, including RTL design, architecture modeling, custom analog IP, compiler, emulation and post-silicon to ensure the full system operates as intended. Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/e7e973ee-a8d7-4985-a28e-bd151527f583","applyUrl":"https://jobs.lever.co/mythic-ai.com/e7e973ee-a8d7-4985-a28e-bd151527f583/apply"},{"additionalPlain":"","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"General & Administrative","location":"Palo Alto, CA","team":"IT","allLocations":["Palo Alto, CA","Austin, TX"]},"createdAt":1787590937212,"descriptionPlain":"","description":"<div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100x the performance of traditional digital systems at the same power and cost. Delivering silicon on that timeline depends on infrastructure that is fast, secure, and always available, and we are hiring a Director of IT &amp; DevOps to own it end to end. This is a single leadership role spanning corporate IT, the business application estate, and the DevOps and compute environments that our EDA and software teams depend on, across four sites: Palo Alto, Austin, Hannover and Bangalore. On one side you will own identity, endpoints, the helpdesk, the office and network footprint, and the SaaS portfolio that runs the company, from Okta and Google Workspace to Rippling, NetSuite, Salesforce and Atlassian. On the other you will own our Austin datacenter, EDA compute and licensing, CI/CD, Kubernetes and our foundry-driven security program. You will set the strategy, build the operating cadence, and modernize an environment that has grown fast and now needs an owner. You will work directly with the CTO organization, Engineering leadership, and the exec staff.</div>","id":"34bc023e-83b9-4503-a065-32197ca232c3","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p>Own corporate IT and DevOps as one function: lead and grow a team covering helpdesk, identity, endpoints, business applications, networking, datacenter, EDA compute and build/CI infrastructure across Palo Alto, Austin, Hannover and Bangalore.</p>\n</li>\n<li>\n<p>Own the corporate application estate end to end, including administration, integration, security review and lifecycle for identity and collaboration (Okta and Okta Workflows, Google Workspace, Microsoft 365, Slack, Zoom including Zoom Rooms and Zoom Phone, Box, Atlassian), business systems (Rippling, Lever, NetSuite, Ramp, DocuSign, Salesforce, Amazon Business), and AI tooling (Claude, ChatGPT, GitHub Copilot).</p>\n</li>\n<li>\n<p>Build what does not exist yet: a single authoritative SaaS and license inventory, a renewal calendar, a named owner and approver for every application, a vendor risk and procurement process, and reporting on spend and utilization. Today the closest thing we have to an application inventory is whatever happens to be assigned in Okta.</p>\n</li>\n<li>\n<p>Own identity as the backbone of the company. Finish connecting Rippling to Okta to FreeIPA so that joiner, mover and leaver events flow automatically, eliminate shared accounts and legacy credentials, enforce group-based access, and close the manual gaps that persist after someone is terminated in Rippling.</p>\n</li>\n<li>\n<p>Own endpoint and device management: complete the NinjaOne UEM rollout, maintain the Mac and Windows laptop standards and imaging with full-disk encryption and key escrow, and stand up real asset tracking through Jira Assets.</p>\n</li>\n<li>\n<p>Own IT service management: run the Jira Service Management portal, the #tech_support intake and the it-tickets alias with real SLAs, and separate user-facing support from internal project work so infrastructure programs run as sprints and epics rather than as interrupts.</p>\n</li>\n<li>\n<p>Run our foundry-driven security and compliance program, including OS lifecycle and patch SLAs, elimination of shared accounts, account lifecycle logging, DLP, file-access auditing and encryption and key management standards, clearing the audit gates that control access to advanced-node design data. You will also close the gaps we know we have, including no SIEM, no endpoint detection and response, no recent penetration testing, no security awareness program and untested backups.</p>\n</li>\n<li>\n<p>Own the Austin datacenter and colocation relationships, capacity and refresh planning for EDA compute, storage and GPU, and the build-out of new cage and rack space.</p>\n</li>\n<li>\n<p>Own our Linux estate and set its direction. Today it runs on two tracks: a RHEL-family stack (RHEL, CentOS and Rocky) certified for EDA tool flows, and Ubuntu for developer VMs, CI agents and containers. You will finish the migration off end-of-life CentOS 7 and RHEL 7, land the supported Rocky baseline the EDA vendors certify against, and decide where to consolidate versus where a second track is genuinely justified.</p>\n</li>\n<li>\n<p>Drive infrastructure modernization already in flight: hypervisor replacement, Kubernetes rollout, consolidated observability, the Meraki network refresh across Austin and Palo Alto, and migration to a centrally managed network stack across all sites.</p>\n</li>\n<li>\n<p>Own EDA infrastructure in partnership with Hardware Engineering: license servers and vendor licensing (Cadence, Synopsys, Siemens), job scheduling, remote desktop delivery, and a fast desktop experience for our Germany and India teams.</p>\n</li>\n<li>\n<p>Own the software and DevOps toolchain in partnership with Engineering: source control across Git/GitHub and Perforce, CI/CD, artifact and build systems, container images, and internal developer platform work.</p>\n</li>\n<li>\n<p>Own the physical IT footprint: badge and access control, CCTV, conference room AV and Zoom Rooms, printers, ISP relationships and office build-outs, working with Office Management across all four sites.</p>\n</li>\n<li>\n<p>Lead the IT side of the videantis (Hannover) integration and the build-out of Mythic India, including identity, email and domain consolidation, network interconnect, tooling migration and GDPR-compliant data handling.</p>\n</li>\n<li>\n<p>Own IT budget, vendor and contract management and the SaaS portfolio, partnering with FP&amp;A on forecasting and renewals.</p>\n</li>\n\n</div>"},{"text":"What you'll bring","content":"<div>\n\n<li>\n<p>10+ years in IT and/or infrastructure engineering, including 3+ years managing and growing a team; experience as the senior-most IT leader at a company or site strongly preferred.</p>\n</li>\n<li>\n<p>Demonstrated ownership of both corporate IT and production/engineering infrastructure. This role will not be handed one or the other.</p>\n</li>\n<li>\n<p>Deep hands-on administration of a modern corporate SaaS stack, including an identity provider (Okta strongly preferred, including Workflows and SCIM provisioning), Google Workspace and/or Microsoft 365, Slack, Zoom, Box or equivalent, and Atlassian.</p>\n</li>\n<li>\n<p>Experience integrating business systems into identity and automating the employee lifecycle end to end, ideally with an HRIS such as Rippling as the system of record.</p>\n</li>\n<li>\n<p>Track record building SaaS governance from scratch: application inventory, license reclamation, renewal and vendor management, spend reporting, and a defensible access-approval process.</p>\n</li>\n<li>\n<p>Deep Linux systems background across both major families: RHEL/CentOS/Rocky and Debian/Ubuntu. You should be comfortable running a mixed estate and have an opinion about when to consolidate and when not to.</p>\n</li>\n<li>\n<p>Practical experience with virtualization, file and NFS storage, networking and colocation datacenter operations.</p>\n</li>\n<li>\n<p>Hands-on experience with automation and infrastructure as code (Ansible, Terraform), containers and Kubernetes, and CI/CD systems.</p>\n</li>\n<li>\n<p>Track record executing OS lifecycle and end-of-life migrations across a production fleet without stalling engineering work.</p>\n</li>\n<li>\n<p>Experience supporting semiconductor or other compute-intensive engineering environments, including EDA tool flows, vendor OS certification matrices, license servers, job schedulers such as Slurm, and large shared filesystems, strongly preferred.</p>\n</li>\n<li>\n<p>Strong security and compliance track record: identity and SSO, MFA, endpoint management and MDM/UEM, patch and vulnerability management, logging and SIEM, and passing customer, foundry or third-party security audits.</p>\n</li>\n<li>\n<p>Experience supporting a distributed, multi-site international organization, including EMEA and India, with an understanding of GDPR and cross-border data handling.</p>\n</li>\n<li>\n<p>Excellent judgment and communication: able to work with executives on risk and cost, with engineers on technical detail, and to say no clearly when that is the right answer.</p>\n</li>\n<li>\n<p>Bachelor's degree in Computer Science, Information Systems, Engineering, or equivalent practical experience.</p>\n</li>\n\n</div>"}],"salaryRange":{"min":200000,"max":275000,"currency":"USD","interval":"per-year-salary"},"text":"Director, IT & DevOps","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100x the performance of traditional digital systems at the same power and cost. Delivering silicon on that timeline depends on infrastructure that is fast, secure, and always available, and we are hiring a Director of IT &amp; DevOps to own it end to end. This is a single leadership role spanning corporate IT, the business application estate, and the DevOps and compute environments that our EDA and software teams depend on, across four sites: Palo Alto, Austin, Hannover and Bangalore. On one side you will own identity, endpoints, the helpdesk, the office and network footprint, and the SaaS portfolio that runs the company, from Okta and Google Workspace to Rippling, NetSuite, Salesforce and Atlassian. On the other you will own our Austin datacenter, EDA compute and licensing, CI/CD, Kubernetes and our foundry-driven security program. You will set the strategy, build the operating cadence, and modernize an environment that has grown fast and now needs an owner. You will work directly with the CTO organization, Engineering leadership, and the exec staff.</div>","descriptionBodyPlain":"","hostedUrl":"https://jobs.lever.co/mythic-ai.com/34bc023e-83b9-4503-a065-32197ca232c3","applyUrl":"https://jobs.lever.co/mythic-ai.com/34bc023e-83b9-4503-a065-32197ca232c3/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Analog Design","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1788535934505,"descriptionPlain":"Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment and support multiple disciplines of IC designers. Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a critical part of making sure our foundation is strong and capable of enhancing our pace of development. \n","description":"<div>\n<p>Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment and support multiple disciplines of IC designers. Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a critical part of making sure our foundation is strong and capable of enhancing our pace of development.&nbsp;</p>\n</div>","id":"d9335250-2818-427c-91d5-8099af64734d","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p>Support IC design and IT leadership with multiple tool and infrastructure upgrades</p>\n</li>\n<li>\n<p>Manage several repositories of PDKs, IPs, and multiple tools from multiple vendors</p>\n</li>\n<li>\n<p>Advise design IT leadership with methodology enhancements and future planning</p>\n</li>\n<li>\n<p>Keep up with advancements in industry tools that are relevant to our goals</p>\n</li>\n<li>\n<p>Where necessary or advantageous, develop custom tools/scripts/plug-ins that are easily adopted by users</p>\n</li>\n\n</div>"},{"text":"What you'll bring ","content":"<div>\n\n<li>\n<p><strong>Deep understanding of the Cadence tool flow is required</strong></p>\n\n</li><li>\n<p>Analog / Mixed-signal design tools (Virtuoso, AMS, Spectre)</p>\n</li>\n<li>\n<p>Layout/signoff (PVS/Pegasus, Calibre)</p>\n</li>\n<li>\n<p>Synthesis/APR/Physical design (Genus, Innovus / DDI)</p>\n</li>\n\n\n<li>\n<p><strong>Revision control experience</strong> and methodology recommendations (perforce/versIC)&nbsp;</p>\n\n</li><li>\n<p>Internal and external IP management</p>\n</li>\n\n\n<li>\n<p><strong>Supporting multiple PDKs simultaneously</strong></p>\n\n</li><li>\n<p>Familiarity with TSMC and GF preferred</p>\n</li>\n\n\n<li>\n<p><strong>Scripting &amp; automation: </strong>Python, Perl, Tcl, Bash/Shell, SKILL; automating EDA flows, tool setup, regression runs, log parsing, environment configuration, and design-data processing.</p>\n</li>\n<li>\n<p><strong>License management: </strong>FlexNet/FlexLM administration and troubleshooting, including license-server configuration, lmstat/lmutil diagnostics, feature availability, checkout failures, queueing, utilization monitoring, and vendor-daemon issues.</p>\n</li>\n<li>\n<p><strong>EDA infrastructure support:</strong> Linux/Unix environment troubleshooting, LSF/Slurm/Grid Engine compute-farm integration, environment modules, tool-version management, and debugging interactions between EDA applications, compute infrastructure, and license servers.</p>\n</li>\n<li>\n<p><strong>CAD flow development:</strong> Development and support of scripted flows integrating tools such as Cadence Virtuoso, Spectre, Xcelium, Synopsys, or Siemens EDA with internal automation, regression, and verification infrastructure.</p>\n</li>\n<li>\n<p><strong>Demonstrated history of solving problems for EDA users</strong></p>\n</li>\n<li>\n<p><strong>Nice-to-haves:</strong></p>\n\n</li><li>\n<p>Remote computing support experience (ETX)&nbsp;</p>\n</li>\n<li>\n<p>Experience supporting engineering across multiple international locations</p>\n</li>\n<li>\n<p>Some degree of sysadmin ability</p>\n</li>\n<li>\n<p>Build systems<strong>:</strong> Make/GNU Make, CMake, custom Makefile-based flows; maintaining build dependencies, environment setup, and reproducible EDA/CAD workflows.</p>\n</li>\n<li>\n<p>CI/CD &amp; regression infrastructure: Jenkins, GitLab CI/CD, GitHub Actions; developing and supporting automated regression, validation, build, and deployment pipelines for EDA tools and design flows.</p>\n</li>\n\n\n\n</div>"}],"salaryRange":{"min":150000,"max":260000,"currency":"USD","interval":"per-year-salary"},"text":"EDA / CAD Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment and support multiple disciplines of IC designers. Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a critical part of making sure our foundation is strong and capable of enhancing our pace of development.&nbsp;</p>\n</div>","descriptionBodyPlain":"Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment and support multiple disciplines of IC designers. Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a critical part of making sure our foundation is strong and capable of enhancing our pace of development. \n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/d9335250-2818-427c-91d5-8099af64734d","applyUrl":"https://jobs.lever.co/mythic-ai.com/d9335250-2818-427c-91d5-8099af64734d/apply"},{"additionalPlain":"","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"General & Administrative","location":"Austin, TX","team":"Legal","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1789667334682,"descriptionPlain":"","description":"<div>\n<p>We are looking for a Legal Operations Manager to build and scale our legal infrastructure as we prepare for the next phase of growth. This person will design and implement an enterprise-wide contract and corporate records management system, establish governance frameworks, and lay the groundwork for public company readiness, working closely with our Chief Legal Officer. The ideal candidate thrives in fast-paced environments, has a builder's mindset, and knows what \"great\" looks like at scale.</p>\n</div>","id":"9c0b804c-66f1-45c0-b969-b95b643e39fd","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p><strong>Contract Management System</strong>: Design, implement, and manage an enterprise-wide CLM platform (e.g., Ironclad, Agiloft, DocuSign CLM), including taxonomy, metadata standards, workflows, templates, and reporting dashboards</p>\n</li>\n<li>\n<p><strong>Corporate Records Management</strong>: Build and maintain a centralized corporate records system covering entity management, board and committee materials, officer/director records, minute books, organizational documents, and capitalization records</p>\n</li>\n<li>\n<p><strong>Process Design &amp; Automation</strong>: Develop and document scalable workflows for contract intake, review, approval routing, execution, and post-execution obligations tracking</p>\n</li>\n<li>\n<p><strong>Public Company Readiness</strong>: Support the legal team in establishing SOX-compliant processes, Section 16 reporting frameworks, insider trading policies, disclosure controls, and board governance procedures</p>\n</li>\n<li>\n<p><strong>Entity &amp; Subsidiary Management</strong>: Maintain corporate entity database, ensure good standing across jurisdictions, manage annual filings, and coordinate registered agent services</p>\n</li>\n<li>\n<p><strong>Cross-Functional Collaboration</strong>: Partner with finance, IT, procurement, HR, and business units to integrate legal systems and ensure organization-wide adoption</p>\n</li>\n<li>\n<p><strong>Data &amp; Reporting</strong>: Build dashboards and reporting tools to provide leadership with visibility into contract status, legal spend, obligations, and compliance milestones</p>\n</li>\n<li>\n<p><strong>Policy &amp; Training</strong>: Draft and roll out internal policies, playbooks, and training materials related to contract execution authority, records retention, and corporate governance</p>\n</li>\n<li>\n<p><strong>Legal Vendor Management</strong>: Evaluate, select, and manage relationships with legal technology vendors, outside counsel, and corporate service providers</p>\n</li>\n\n</div>"},{"text":"What you'll bring ","content":"<div>\n\n<li>\n<p><strong>Experience</strong>: 7+ years as a corporate paralegal, legal operations professional, or similar role, with at least 3 years focused on building or scaling legal systems</p>\n</li>\n<li>\n<p><strong>Education</strong>: Bachelor's degree required</p>\n</li>\n<li>\n<p><strong>Technology Proficiency</strong>: Hands-on experience administering an enterprise CLM platform; Experience with AI-powered legal tools and workflow automation a plus</p>\n</li>\n<li>\n<p><strong>Corporate Governance</strong>: Demonstrated experience managing corporate records for multi-entity structures, including board support and subsidiary governance; Multi-jurisdictional corporate governance experience (US, Canada, EU, Israel, India) a plus</p>\n</li>\n<li>\n<p><strong>Public Company Exposure</strong>: Prior experience at a public company or supporting IPO&nbsp; readiness, including familiarity with SEC filing processes, SOX controls, and proxy materials</p>\n</li>\n<li>\n<p><strong>Communication</strong>: Excellent written and verbal communication skills, with the ability to create process documentation and train non-legal stakeholders</p>\n</li>\n\n</div>"}],"salaryRange":{"min":140000,"max":210000,"currency":"USD","interval":"per-year-salary"},"text":"Legal Operations Manager","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>We are looking for a Legal Operations Manager to build and scale our legal infrastructure as we prepare for the next phase of growth. This person will design and implement an enterprise-wide contract and corporate records management system, establish governance frameworks, and lay the groundwork for public company readiness, working closely with our Chief Legal Officer. The ideal candidate thrives in fast-paced environments, has a builder's mindset, and knows what \"great\" looks like at scale.</p>\n</div>","descriptionBodyPlain":"","hostedUrl":"https://jobs.lever.co/mythic-ai.com/9c0b804c-66f1-45c0-b969-b95b643e39fd","applyUrl":"https://jobs.lever.co/mythic-ai.com/9c0b804c-66f1-45c0-b969-b95b643e39fd/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Hardware Productization","location":"Palo Alto, CA","team":"Manufacturing","allLocations":["Palo Alto, CA","Israel"]},"createdAt":1788537460149,"descriptionPlain":"The Principal Camera & Sensor Applications Engineer is the technical front line between Mythic's silicon and the customers who will build products on it. The role leads initial technical engagements to understand customer imaging, sensing, and embedded-AI use cases, translates those needs into measurable system requirements, and builds the demonstrations and reference designs that prove Mythic's analog compute advantage in a real camera system. Internally, the role is the sensor and camera-system subject-matter expert — identifying where Mythic technology adds value across automotive, robotics, medical, consumer, and industrial applications, and converting field insight into MRDs, PRDs, and prioritized engineering requirements. \nThe position is deliberately complementary to the Director, Sensor System Engineering role: where that role owns platform architecture and integration from the core HW/SW side, this role owns the customer-facing and applications side — engagement, requirements capture, demos and evaluation kits, design-in support, and system-level validation criteria. Together they close the loop between what customers need and what the Gen2 roadmap delivers. \n","description":"<div>\n<p>The Principal Camera &amp; Sensor Applications Engineer is the technical front line between Mythic's silicon and the customers who will build products on it. The role leads initial technical engagements to understand customer imaging, sensing, and embedded-AI use cases, translates those needs into measurable system requirements, and builds the demonstrations and reference designs that prove Mythic's analog compute advantage in a real camera system. Internally, the role is the sensor and camera-system subject-matter expert — identifying where Mythic technology adds value across automotive, robotics, medical, consumer, and industrial applications, and converting field insight into MRDs, PRDs, and prioritized engineering requirements.&nbsp;</p>\n<p>The position is deliberately complementary to the Director, Sensor System Engineering role: where that role owns platform architecture and integration from the core HW/SW side, this role owns the customer-facing and applications side — engagement, requirements capture, demos and evaluation kits, design-in support, and system-level validation criteria. Together they close the loop between what customers need and what the Gen2 roadmap delivers.&nbsp;</p>\n</div>","id":"37df95fb-a05e-48f2-a11a-08a0ad712ab7","lists":[{"text":"What you'll do ","content":"<div>\n<p>External/Customer-Facing</p>\n\n<li>\n<p>Lead initial technical engagements to understand customer imaging, sensing, and embedded-AI use cases, system architectures, and product constraints.</p>\n</li>\n<li>\n<p>Translate customer needs into measurable requirements for image quality, AI performance, latency, power, reliability, interfaces, and system cost.</p>\n</li>\n<li>\n<p>Define and develop customer demonstrations, evaluation kits, reference designs, and proof-of-concept systems integrating sensors with Mythic technology.</p>\n</li>\n<li>\n<p>Support customers through technical evaluation, system integration, troubleshooting, and design-in.</p>\n</li>\n\n<p>Internal-Facing</p>\n\n<li>\n<p>Serve as the sensor and camera-system subject-matter expert, identifying where Mythic technology can add value across automotive, robotics, medical, consumer, and industrial applications.</p>\n</li>\n<li>\n<p>Translate system and customer requirements into MRDs, PRDs, functional specifications, and prioritized engineering requirements.</p>\n</li>\n<li>\n<p>Work closely with silicon, hardware, software, and AI teams to assess feasibility, identify capability gaps, and guide product-roadmap decisions.</p>\n</li>\n<li>\n<p>Define system-level validation plans and success criteria covering image quality, AI accuracy, latency, power, reliability, and overall customer experience.</p>\n</li>\n\n<p>&nbsp;</p>\n</div>"},{"text":"What you'll bring ","content":"<div>\n\n<li>\n<p>10+ years in camera systems, imaging, or embedded vision, including senior technical or team leadership.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Deep expertise across the imaging signal chain: image sensors, optics, ISP, tuning and calibration, and image-quality measurement.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Demonstrated success taking camera or vision systems from architecture and prototype through validation and volume production.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Strong customer-facing technical skills — running evaluations, integration support, and troubleshooting with external engineering teams.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Proven ability to author functional specifications, MRDs/PRDs, and prioritized requirements that engineering teams can execute against.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Cross-functional fluency with silicon, hardware, firmware, software, and AI teams.&nbsp;</p>\n</li>\n\n<p><strong>Preferred Qualifications</strong>&nbsp;</p>\n\n<li>\n<p>Experience deploying vision models on embedded or specialized AI accelerators; familiarity with edge AI, SoC integration, or compute-in-memory architectures.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Background spanning two or more of Automotive (ADAS/in-cabin), Robotics, Medical, Consumer, and Industrial imaging.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Hands-on development of reference designs, evaluation kits, or proof-of-concept camera systems.&nbsp;</p>\n</li>\n\n\n<li>\n<p>Semiconductor-side experience with image sensors or ISP product definition.&nbsp;</p>\n</li>\n\n</div>"}],"salaryRange":{"min":180000,"max":270000,"currency":"USD","interval":"per-year-salary"},"text":"Principal Camera & Sensor Applications Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>The Principal Camera &amp; Sensor Applications Engineer is the technical front line between Mythic's silicon and the customers who will build products on it. The role leads initial technical engagements to understand customer imaging, sensing, and embedded-AI use cases, translates those needs into measurable system requirements, and builds the demonstrations and reference designs that prove Mythic's analog compute advantage in a real camera system. Internally, the role is the sensor and camera-system subject-matter expert &mdash; identifying where Mythic technology adds value across automotive, robotics, medical, consumer, and industrial applications, and converting field insight into MRDs, PRDs, and prioritized engineering requirements.&nbsp;</p>\n<p>The position is deliberately complementary to the Director, Sensor System Engineering role: where that role owns platform architecture and integration from the core HW/SW side, this role owns the customer-facing and applications side &mdash; engagement, requirements capture, demos and evaluation kits, design-in support, and system-level validation criteria. Together they close the loop between what customers need and what the Gen2 roadmap delivers.&nbsp;</p>\n</div>","descriptionBodyPlain":"The Principal Camera & Sensor Applications Engineer is the technical front line between Mythic's silicon and the customers who will build products on it. The role leads initial technical engagements to understand customer imaging, sensing, and embedded-AI use cases, translates those needs into measurable system requirements, and builds the demonstrations and reference designs that prove Mythic's analog compute advantage in a real camera system. Internally, the role is the sensor and camera-system subject-matter expert — identifying where Mythic technology adds value across automotive, robotics, medical, consumer, and industrial applications, and converting field insight into MRDs, PRDs, and prioritized engineering requirements. \nThe position is deliberately complementary to the Director, Sensor System Engineering role: where that role owns platform architecture and integration from the core HW/SW side, this role owns the customer-facing and applications side — engagement, requirements capture, demos and evaluation kits, design-in support, and system-level validation criteria. Together they close the loop between what customers need and what the Gen2 roadmap delivers. \n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/37df95fb-a05e-48f2-a11a-08a0ad712ab7","applyUrl":"https://jobs.lever.co/mythic-ai.com/37df95fb-a05e-48f2-a11a-08a0ad712ab7/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire&nbsp;smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Digital Design","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1758923118073,"descriptionPlain":"We’re hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nRTL Design at Mythic:\nAt Mythic, our RTL design team is at the heart of transforming our custom dataflow architecture into working silicon. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that enables our breakthrough AI hardware. The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon teams to ensure every component integrates seamlessly into the full system. Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.\n","description":"<div>We’re hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100× the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We’ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000–$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">RTL Design at Mythic:</strong></div>\n<div>At Mythic, our RTL design team is at the heart of transforming our custom dataflow architecture into working silicon. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that enables our breakthrough AI hardware. The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon teams to ensure every component integrates seamlessly into the full system. Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.</div>","id":"08079bf3-6fed-4de1-bb79-8390788d814f","lists":[{"text":"Responsibilities","content":"\n<li>Design and implement RTL for Mythic's next-generation AI processor.</li>\n<li>Develop and optimize high-performance, low-power components including datapaths, controllers, memory subsystems, and interconnects.</li>\n<li>Collaborate with architects and verification engineers to define microarchitecture and ensure functional correctness.</li>\n<li>Drive timing closure by working with synthesis and physical design teams.</li>\n<li>Participate in design reviews and contribute to improving RTL coding practices and methodologies.</li>\n"},{"text":"Requirements","content":"\n<li>Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.</li>\n<li>3+ years of industry experience in RTL design, microarchitecture, and architecture development.</li>\n<li>Solid understanding of computer architecture fundamentals (pipelines, caches, coherence, memory hierarchies).</li>\n<li>Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines.</li>\n<li>Familiarity with timing constraints, physical design considerations, and EDA flows.</li>\n<li>Hands-on experience with simulation, synthesis, linting, and static timing analysis tools.</li>\n<li>Strong problem-solving and communication skills with ability to work in cross-functional teams.</li>\n"}],"text":"RTL Design Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>We&rsquo;re hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100&times; the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from &ndash;40 &deg;C to +125 &deg;C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We&rsquo;ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000&ndash;$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">RTL Design at Mythic:</strong></div>\n<div>At Mythic, our RTL design team is at the heart of transforming our custom dataflow architecture into working silicon. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that enables our breakthrough AI hardware. The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon teams to ensure every component integrates seamlessly into the full system. Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.</div>","descriptionBodyPlain":"We’re hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nRTL Design at Mythic:\nAt Mythic, our RTL design team is at the heart of transforming our custom dataflow architecture into working silicon. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that enables our breakthrough AI hardware. The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon teams to ensure every component integrates seamlessly into the full system. Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/08079bf3-6fed-4de1-bb79-8390788d814f","applyUrl":"https://jobs.lever.co/mythic-ai.com/08079bf3-6fed-4de1-bb79-8390788d814f/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire&nbsp;smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Digital Design","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1759940288780,"descriptionPlain":"We’re hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nDesign Verification at Mythic:\nAt Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.\n \nBecause today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.\n","description":"<div>We’re hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100× the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We’ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000–$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">Design Verification at Mythic:</strong></div>\n<div>At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.</div>\n<div>&nbsp;</div>\n<div>Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.</div>","id":"e171e36c-3e2c-4d1a-bc45-f9b5841c3157","lists":[{"text":"Responsibilities","content":"\n<li>Hands-on system-level and block-level verification.</li>\n<li>Development of test plans and coverage plans.</li>\n<li>Testbench development and execution using UVM or other advanced DV methodologies.</li>\n<li>Creation of verification infrastructure and flows.</li>\n<li>Leverage architecture models and emulation environments to help verify large AI network functionality on the design.</li>\n<li>Collaborate with RTL designers and architects to verify subsystems such as scheduling fabrics, interconnects, DMA engines, and memory controllers.</li>\n"},{"text":"Requirements","content":"\n<li>Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.</li>\n<li>8+ years of industry experience developing verification testbenches.</li>\n<li>Knowledge of verification methodologies (UVM or similar).</li>\n<li>Solid understanding of computer architecture, including datapaths, memory hierarchies, and interconnects.</li>\n<li>Experience verifying one or more of the following: scheduling subsystems, high-performance interconnects, DMA engines, or memory subsystems.</li>\n<li>Understanding of Verilog, SystemVerilog, and UVM.</li>\n<li>Proven track record of first-pass silicon success.</li>\n<li>Strong communication skills, both written and spoken.</li>\n"},{"text":"Preferred Qualifications","content":"\n<li>Experience with emulation or FPGA prototyping for large-scale designs.</li>\n<li>Knowledge of coverage-driven verification and advanced stimulus generation techniques.</li>\n<li>Exposure to formal verification methods and tools.</li>\n<li>Familiarity with power-aware and performance-driven verification flows.</li>\n<li>Prior experience verifying AI, DSP, or other highly parallel architectures.</li>\n<li>Strong scripting skills (Python or similar) for automation and infrastructure development.</li>\n"}],"text":"Senior Design Verification Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>We&rsquo;re hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100&times; the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from &ndash;40 &deg;C to +125 &deg;C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We&rsquo;ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000&ndash;$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">Design Verification at Mythic:</strong></div>\n<div>At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.</div>\n<div>&nbsp;</div>\n<div>Because today&rsquo;s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches&mdash;combining simulation, modeling, and innovative verification strategies&mdash;to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.</div>","descriptionBodyPlain":"We’re hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nDesign Verification at Mythic:\nAt Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.\n \nBecause today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/e171e36c-3e2c-4d1a-bc45-f9b5841c3157","applyUrl":"https://jobs.lever.co/mythic-ai.com/e171e36c-3e2c-4d1a-bc45-f9b5841c3157/apply"},{"additionalPlain":"Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n \nWe look forward to reviewing your application!\n\n\nAt Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</div>\n<div>&nbsp;</div>\n<div>We look forward to reviewing your application!</div><div><br></div><div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Mythic India","location":"Bangalore","team":"System-on-Chip","allLocations":["Bangalore"]},"createdAt":1765536673967,"descriptionPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. The Mythic Analog Matrix Processor (Mythic AMP™) makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised a fresh round of funding, and has offices in Palo Alto, CA, and Austin, TX.\n \nAbout the role: \nAt Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.\nBecause today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.\n","description":"<div><strong style=\"font-size: 24px;\">About us:</strong></div>\n<div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. The Mythic Analog Matrix Processor (Mythic AMP™) makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised a fresh round of funding, and has offices in Palo Alto, CA, and Austin, TX.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">About the role: </strong></div>\n<div>\n<p>At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.</p>\n<p>Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.</p>\n</div>","id":"a891dbb1-736a-46ed-bb05-1039a1338876","lists":[{"text":"Here is what you will do","content":"<div>\n\n<li>Hands-on&nbsp;system-level&nbsp;and&nbsp;block-level&nbsp;verification.</li>\n<li>Development&nbsp;of&nbsp;test&nbsp;plans&nbsp;and&nbsp;coverage&nbsp;plans.</li>\n<li>Testbench&nbsp;development&nbsp;and&nbsp;execution&nbsp;using&nbsp;UVM&nbsp;or&nbsp;other&nbsp;advanced&nbsp;DV&nbsp;methodologies.</li>\n<li>Creation&nbsp;of&nbsp;verification&nbsp;infrastructure&nbsp;and&nbsp;flows.</li>\n<li>Leverage&nbsp;architecture&nbsp;models&nbsp;to&nbsp;help&nbsp;verify&nbsp;large&nbsp;AI&nbsp;network&nbsp;functionality&nbsp;on&nbsp;the&nbsp;design.</li>\n<li>Collaborate&nbsp;with&nbsp;RTL&nbsp;designers&nbsp;and&nbsp;architects&nbsp;to&nbsp;verify&nbsp;subsystems&nbsp;such&nbsp;as&nbsp;scheduling&nbsp;fabrics,&nbsp;interconnects,&nbsp;DMA engines, and memory controllers.</li>\n\n</div>"},{"text":"Here's the background we hope you have:","content":"\n<li>Bachelor’s,&nbsp;Master’s,&nbsp;or&nbsp;Ph.D.&nbsp;degree&nbsp;in&nbsp;Electrical&nbsp;Engineering,.</li>\n<li>5+&nbsp;years&nbsp;of&nbsp;industry&nbsp;experience&nbsp;developing&nbsp;verification&nbsp;testbenches.</li>\n<li>Knowledge&nbsp;of&nbsp;verification&nbsp;methodologies&nbsp;(UVM&nbsp;or&nbsp;similar).</li>\n<li>Solid&nbsp;understanding&nbsp;of&nbsp;computer&nbsp;architecture,&nbsp;including&nbsp;datapaths,&nbsp;memory&nbsp;hierarchies,&nbsp;and&nbsp;interconnects.</li>\n<li>Experience&nbsp;verifying&nbsp;one&nbsp;or&nbsp;more&nbsp;of&nbsp;the&nbsp;following:&nbsp;scheduling&nbsp;subsystems,&nbsp;high-performance&nbsp;interconnects,&nbsp;DMA&nbsp;engines,&nbsp;or&nbsp;memory&nbsp;subsystems.</li>\n<li>Understanding&nbsp;of&nbsp;Verilog,&nbsp;SystemVerilog,&nbsp;and&nbsp;UVM.</li>\n<li>Knowledge&nbsp;of&nbsp;coverage-driven&nbsp;verification&nbsp;and&nbsp;advanced&nbsp;stimulus&nbsp;generation&nbsp;techniques.</li>\n<li>Proven&nbsp;track&nbsp;record&nbsp;of&nbsp;first-pass&nbsp;silicon&nbsp;success.</li>\n<li>Strong&nbsp;communication&nbsp;skills,&nbsp;both&nbsp;written&nbsp;and&nbsp;spoken.</li>\n\n<p>&nbsp;</p>"},{"text":"The following would be nice to have, but is not required:","content":"\n<li>Exposure&nbsp;to&nbsp;formal&nbsp;verification&nbsp;methods&nbsp;and&nbsp;tools.</li>\n<li>Familiarity&nbsp;with&nbsp;power-aware&nbsp;and&nbsp;performance-driven&nbsp;verification&nbsp;flows.</li>\n<li>Prior&nbsp;experience&nbsp;verifying&nbsp;AI,&nbsp;DSP,&nbsp;or&nbsp;other&nbsp;highly&nbsp;parallel&nbsp;architectures.</li>\n<li>Strong&nbsp;scripting&nbsp;skills&nbsp;(Python&nbsp;or&nbsp;similar)&nbsp;for&nbsp;automation&nbsp;and&nbsp;infrastructure&nbsp;development.</li>\n"}],"text":"Senior Digital Verification Engineer","country":"IN","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div><strong style=\"font-size: 24px;\">About us:</strong></div>\n<div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE&trade;) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. The Mythic Analog Matrix Processor (Mythic AMP&trade;) makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised a fresh round of funding, and has offices in Palo Alto, CA, and Austin, TX.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">About the role: </strong></div>\n<div>\n<p>At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.</p>\n<p>Because today&rsquo;s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches&mdash;combining simulation, modeling, and innovative verification strategies&mdash;to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.</p>\n</div>","descriptionBodyPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. The Mythic Analog Matrix Processor (Mythic AMP™) makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised a fresh round of funding, and has offices in Palo Alto, CA, and Austin, TX.\n \nAbout the role: \nAt Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.\nBecause today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/a891dbb1-736a-46ed-bb05-1039a1338876","applyUrl":"https://jobs.lever.co/mythic-ai.com/a891dbb1-736a-46ed-bb05-1039a1338876/apply"},{"additionalPlain":" Equal Opportunity\nMythic is committed to building an inclusive team and encourages candidates from all backgrounds to apply.\n","additional":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\"><strong>&nbsp;</strong><strong>Equal Opportunity</strong></p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Mythic is committed to building an inclusive team and encourages candidates from all backgrounds to apply.</p>\n</div>","categories":{"commitment":"Full-time","department":"Mythic India","location":"Bangalore","team":"System-on-Chip","allLocations":["Bangalore"]},"createdAt":1783012709190,"descriptionPlain":"Mythic is building next-generation AI hardware platforms that require tight integration between silicon, package, PCB, system architecture, and manufacturing execution. We are looking for a hands-on Senior Hardware Systems Design Engineer to own the design and implementation of complex reference boards, customer-facing hardware platforms, and system-level board solutions.\nThis is a build role for an experienced hardware engineer who can take evolving silicon capabilities, incomplete requirements, mechanical and manufacturing constraints, and high-speed interface requirements, then turn them into robust, manufacturable PCB designs.\nThe ideal candidate has deep experience designing complex boards from concept through schematic, PCB layout guidance, signal integrity review, fabrication documentation, assembly support, bring-up, debug, and customer or manufacturing handoff. You should be comfortable working across high-speed digital, power delivery, RF/digital partitioning, clocking, board stack-up, connectors, vendor management, and production readiness.\nYou will play a critical role in transforming Mythic’s silicon into usable hardware platforms for internal development, customer evaluation, partner integration, and production deployment.\n","description":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Mythic is building next-generation AI hardware platforms that require tight integration between silicon, package, PCB, system architecture, and manufacturing execution. We are looking for a hands-on <strong>Senior Hardware Systems Design Engineer</strong> to own the design and implementation of complex reference boards, customer-facing hardware platforms, and system-level board solutions.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This is a build role for an experienced hardware engineer who can take evolving silicon capabilities, incomplete requirements, mechanical and manufacturing constraints, and high-speed interface requirements, then turn them into robust, manufacturable PCB designs.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">The ideal candidate has deep experience designing complex boards from concept through schematic, PCB layout guidance, signal integrity review, fabrication documentation, assembly support, bring-up, debug, and customer or manufacturing handoff. You should be comfortable working across high-speed digital, power delivery, RF/digital partitioning, clocking, board stack-up, connectors, vendor management, and production readiness.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">You will play a critical role in transforming Mythic’s silicon into usable hardware platforms for internal development, customer evaluation, partner integration, and production deployment.</p>\n</div>","id":"38424421-b45e-47b3-82e2-6c53ab065950","lists":[{"text":"What You’ll Own","content":"<div>\n<ul type=\"disc\" style=\"margin-top: 0in; margin-bottom: 0in;\">\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Own the design and development of reference boards, evaluation platforms, and system-level hardware platforms for Mythic silicon.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Translate silicon capabilities, package constraints, and product requirements into practical, high-quality board-level designs.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Drive schematic design and work closely with internal or external PCB layout resources to deliver complex, manufacturable PCBs.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Own key board-level subsystems including power delivery, high-speed interfaces, clocking, connectors, control interfaces, and board management circuitry.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Design and review high-speed digital interfaces such as PCIe, Ethernet, SerDes, SPI, I2C, GPIO, and related board-level interconnects.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Apply signal integrity and power integrity best practices to high-speed PCB designs, including stack-up planning, impedance control, routing constraints, retimers/redrivers, and layout verification.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Incorporate package-level, mechanical, thermal, and manufacturing constraints into board architecture and PCB implementation.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Work with PCB fabrication, assembly, test, and manufacturing partners to ensure smooth prototype builds and production readiness.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Generate and release complete design documentation including schematics, fabrication notes, assembly notes, BOMs, layout constraints, and production support material.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Support board bring-up, debug, validation, and system integration in collaboration with silicon, firmware, software, test, product, and manufacturing teams.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Drive design-for-manufacturability (DFM), design-for-test (DFT), and design-for-reliability (DFR) improvements across prototype and production builds.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Identify and resolve system-level issues involving board layout, power, clocking, signal integrity, RF/digital interaction, connectors, and manufacturing variation.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Work closely with integration, product, test, and packaging teams to ensure successful system deployment</li>\n\n</ul></div>"},{"text":"What We’re Looking For","content":"<div>\n<ul type=\"disc\" style=\"margin-top: 0in; margin-bottom: 0in;\">\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Significant experience in board-level hardware design, PCB design, or systems hardware engineering.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Proven track record designing and bringing up complex, high-speed PCBs.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Strong background in high-speed digital design, SerDes interfaces, controlled impedance routing, and board stack-up planning.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience with PCIe, Ethernet, SFP/SFP+, retimers, redrivers, FPGAs, embedded control interfaces, or similar high-speed platforms.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Strong understanding of power delivery, power rail planning, filtering, sequencing, and board-level power integrity.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience with schematic capture, PCB layout tools, and layout review using tools such as Altium, Cadence, Mentor PADS, HyperLynx, or similar.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Ability to guide PCB layout vendors or internal layout designers through placement, routing, constraints, documentation, and design reviews.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience releasing PCB fabrication packages, assembly documentation, BOMs, and manufacturing support files.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Hands-on experience supporting PCB bring-up, debug, system test, and early production builds.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Ability to operate in fast-moving environments where requirements may evolve and engineering judgment is required.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Strong ownership mindset, attention to detail, and ability to drive designs from concept through working hardware.</li>\n\n</ul></div>"},{"text":"Preferred Qualifications","content":"<div>\n<ul type=\"disc\" style=\"margin-top: 0in; margin-bottom: 0in;\">\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Minimum Bachelor’s degree in any engineering field, with <strong>15+ years of hands-on experience</strong> designing, implementing, bringing up, and releasing complex PCB and hardware systems.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience with AI hardware, accelerator platforms, high-performance compute, networking platforms, or advanced semiconductor evaluation boards.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience designing boards that include high-speed digital, RF, analog, and power circuitry on the same platform.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Familiarity with package-to-board interactions, advanced packages, multi-die systems, or chiplet-based systems.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience working with OSATs, PCB fabricators, assembly houses, contract manufacturers, and external design/layout vendors.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience with thermal, mechanical, enclosure, and connector constraints in compact or production hardware systems.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience supporting hardware through customer evaluation, field deployment, or manufacturing transition.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Background with FPGA-based platforms, PCIe root complex/endpoint systems, 10G Ethernet, RF modules, or embedded system boards.</li>\n\n</ul></div>"},{"text":"What Success Looks Like","content":"<div>\n<ul type=\"disc\" style=\"margin-top: 0in; margin-bottom: 0in;\">\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Mythic reference boards and hardware platforms are robust, reliable, and require minimal re-spins.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Board designs successfully integrate silicon, package, power, clocking, high-speed interfaces, and mechanical constraints.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Hardware platforms are easy to bring up, stable in system integration, and ready for customer or partner use.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">PCB layouts meet signal integrity, power integrity, manufacturability, and reliability expectations.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Prototype builds transition smoothly into manufacturable, documented, and supportable hardware.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">External vendors receive clear guidance, complete documentation, and timely technical decisions.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Integration, product, test, firmware, software, and manufacturing teams have the hardware support they need to move quickly.</li>\n\n</ul></div>"},{"text":"Why This Role Matters","content":"<div>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">At Mythic, hardware design is how we turn advanced silicon into real systems that customers and partners can evaluate, integrate, and deploy.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This role is central to building the boards and platforms that showcase the full value of Mythic’s technology. You will make critical design decisions, work across silicon and systems, and directly influence the quality, usability, and manufacturability of Mythic hardware.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">If you are a hands-on senior hardware engineer who enjoys building complex boards, solving system-level problems, working with vendors, and driving designs all the way from concept to functioning hardware, we should talk.</p>\n</div>"},{"text":"Why Mythic","content":"<div>\n<ul type=\"disc\" style=\"margin-top: 0in; margin-bottom: 0in;\">\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Work on ambitious AI hardware with real system complexity.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Own critical board and systems design at a company where your work directly impacts product delivery.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Join a highly collaborative team solving difficult engineering problems across silicon, package, board, and system design.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Move fast, make decisions, and build from first principles.</li>\n<li style=\"margin-top: 0in; margin-right: 0in; margin-bottom: 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Have outsized impact in a role with real scope and visibility.</li>\n\n</ul></div>"}],"text":"Senior Hardware Systems Design Engineer","country":"IN","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Mythic is building next-generation AI hardware platforms that require tight integration between silicon, package, PCB, system architecture, and manufacturing execution. We are looking for a hands-on <strong>Senior Hardware Systems Design Engineer</strong> to own the design and implementation of complex reference boards, customer-facing hardware platforms, and system-level board solutions.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This is a build role for an experienced hardware engineer who can take evolving silicon capabilities, incomplete requirements, mechanical and manufacturing constraints, and high-speed interface requirements, then turn them into robust, manufacturable PCB designs.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">The ideal candidate has deep experience designing complex boards from concept through schematic, PCB layout guidance, signal integrity review, fabrication documentation, assembly support, bring-up, debug, and customer or manufacturing handoff. You should be comfortable working across high-speed digital, power delivery, RF/digital partitioning, clocking, board stack-up, connectors, vendor management, and production readiness.</p>\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">You will play a critical role in transforming Mythic&rsquo;s silicon into usable hardware platforms for internal development, customer evaluation, partner integration, and production deployment.</p>\n</div>","descriptionBodyPlain":"Mythic is building next-generation AI hardware platforms that require tight integration between silicon, package, PCB, system architecture, and manufacturing execution. We are looking for a hands-on Senior Hardware Systems Design Engineer to own the design and implementation of complex reference boards, customer-facing hardware platforms, and system-level board solutions.\nThis is a build role for an experienced hardware engineer who can take evolving silicon capabilities, incomplete requirements, mechanical and manufacturing constraints, and high-speed interface requirements, then turn them into robust, manufacturable PCB designs.\nThe ideal candidate has deep experience designing complex boards from concept through schematic, PCB layout guidance, signal integrity review, fabrication documentation, assembly support, bring-up, debug, and customer or manufacturing handoff. You should be comfortable working across high-speed digital, power delivery, RF/digital partitioning, clocking, board stack-up, connectors, vendor management, and production readiness.\nYou will play a critical role in transforming Mythic’s silicon into usable hardware platforms for internal development, customer evaluation, partner integration, and production deployment.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/38424421-b45e-47b3-82e2-6c53ab065950","applyUrl":"https://jobs.lever.co/mythic-ai.com/38424421-b45e-47b3-82e2-6c53ab065950/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Palo Alto, CA","team":"Non-Volatile Memories","allLocations":["Palo Alto, CA"]},"createdAt":1786996673530,"descriptionPlain":"We are looking for a Senior Mixed Signal / Memory Circuit Designer to help design and verify complete NVM IP macros for Mythic's product architecture using foundry NVM technologies.\n","description":"<div>We are looking for a Senior Mixed Signal / Memory Circuit Designer to help design and verify complete NVM IP macros for Mythic's product architecture using foundry NVM technologies.</div>","id":"dbd149fd-c542-4548-b0f2-159e22b571f5","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p>Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available NVM (non-volatile memory) technologies from foundries</p>\n</li>\n<li>\n<p>Involve in NVM architecture for optimum performance and area</p>\n</li>\n<li>\n<p>Design and verify the new circuits to handshake with the analog computation blocks</p>\n</li>\n<li>\n<p>Design, optimize and verify the NVM circuits including and not limited to high voltage generator block, x-path, y-path, test and peripheral circuits</p>\n</li>\n<li>\n<p>Participate in RNM (Real Number Modeling) and functional model of NVM circuits for verification</p>\n</li>\n<li>\n<p>Responsible for verifying the functional blocks and full chip level interfacing with NVM design</p>\n</li>\n<li>\n<p>Work closely with the validation engineers to expedite the silicon evaluation process</p>\n</li>\n<li>\n<p>Work closely with backend teams for the production qualification releases</p>\n</li>\n\n</div>"},{"text":"What you'll bring ","content":"<div>\n\n<li>\n<p>Ph.D. or MS degree in EE or related 3+ years industrial experience</p>\n</li>\n<li>\n<p>Hands-on experience in circuit design, full chip circuit simulation, debugging, and verification</p>\n</li>\n<li>\n<p>Hands-on experience in NVM embedded or NVM product (NOR, NAND, etc) is a plus</p>\n</li>\n<li>\n<p>Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling is a plus</p>\n</li>\n<li>\n<p>Familiar and hands-on experience some memory circuit block design: decoder, high voltage switches, charge pumps, HV and LV regulator, bandgap, high performance low power sense amp, monitoring, and BIST capability is a plus</p>\n</li>\n<li>\n<p>Good understanding &amp; knowledge of semiconductor device physics, and advanced process technology&nbsp;</p>\n</li>\n<li>\n<p>Experienced in design tapeout activities, layout supervision, silicon debugging</p>\n</li>\n<li>\n<p>Excellent communication skills, ability to work well across multi-functional teams</p>\n</li>\n<li>\n<p>Fluent in all major CAD tools: SPICE, Cadence, Verilog simulation software</p>\n</li>\n<li>\n<p>Must be a self-starter, detail-oriented, and team player</p>\n</li>\n\n</div>"}],"salaryRange":{"min":178000,"max":240000,"currency":"USD","interval":"per-year-salary"},"text":"Senior Mixed Signal / Memory Circuit Designer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>We are looking for a Senior Mixed Signal / Memory Circuit Designer to help design and verify complete NVM IP macros for Mythic's product architecture using foundry NVM technologies.</div>","descriptionBodyPlain":"We are looking for a Senior Mixed Signal / Memory Circuit Designer to help design and verify complete NVM IP macros for Mythic's product architecture using foundry NVM technologies.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/dbd149fd-c542-4548-b0f2-159e22b571f5","applyUrl":"https://jobs.lever.co/mythic-ai.com/dbd149fd-c542-4548-b0f2-159e22b571f5/apply"},{"additionalPlain":"","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Research & Advanced Development","location":"Palo Alto, CA","team":"Non-Volatile Memory","allLocations":["Palo Alto, CA"]},"createdAt":1785968018718,"descriptionPlain":"","description":"<div>\n<p>Mythic was founded in 2012 by University of Michigan researchers Mike Henry and Dave Fick, who set out to answer a simple question: what if a chip worked the way the human brain does? That first-principles thinking became analog compute-in-memory—an architecture that processes data where it lives instead of shuttling it back and forth across power-hungry pathways. Today, that architecture is proving its value. Mythic is the only analog compute-in-memory platform delivering 100x efficiency gains for the innovators who need AI inference at scale without the unsustainable energy cost, with technology proven across data center, automotive, robotics, and defense applications. Backed by an oversubscribed $125M raise from investors including Honda, Lockheed Martin, SoftBank, and DCVC, we're scaling toward a 1,024-chiplet architecture built for the largest LLM workloads in the data center—taking on the GPU status quo directly. We don't sell what's coming. We sell proven technology that works today, built on a fundamentally different approach to computing that we’ve been refining for over a decade. Intelligence is inevitable. How we get there is a choice. And Mythic is proving that power and efficiency were never a tradeoff to begin with.</p>\n</div>","id":"9a2f66be-66f0-4d76-afb8-c20c56755225","lists":[{"text":"What you'll do","content":"<div>\n\n<li>\n<p>Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available NVM technologies from foundries</p>\n</li>\n<li>\n<p>Involve in NVM architecture for optimum performance and area</p>\n</li>\n<li>\n<p>Design and verify the new circuits to handshake with the analog computation blocks</p>\n</li>\n<li>\n<p>Design, optimize and verify the NVM circuits including and not limited to high voltage generator block, x-path, y-path, test and peripheral circuits</p>\n</li>\n<li>\n<p>Participate in RNM and functional model of NVM circuits for verification</p>\n</li>\n<li>\n<p>Responsible for verifying the functional blocks and full chip level interfacing with NVM design</p>\n</li>\n<li>\n<p>Work closely with the validation engineers to expedite the silicon evaluation process</p>\n</li>\n<li>\n<p>Work closely with backend teams for the production qualification releases</p>\n</li>\n\n</div>"},{"text":"What you'll bring","content":"<div>\n\n<li>\n<p>Ph.D. or MS degree in EE or related 5-10+ years industrial experience</p>\n</li>\n<li>\n<p>Hands-on experience in NVM embedded or NVM product design and verification</p>\n</li>\n<li>\n<p>Hands-on experience in NVM full chip circuit simulation setup, debugging, and verification</p>\n</li>\n<li>\n<p>Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling</p>\n</li>\n<li>\n<p>Familiar and hands-on experience some or all memory circuit block design: decoder, high voltage switches, charge pumps, HV and LV regulator, bandgap, high performance low power sense amp, monitoring, and BIST capability</p>\n</li>\n<li>\n<p>Good understanding &amp; knowledge of semiconductor device physics, and advanced process technology</p>\n</li>\n<li>\n<p>Experienced in multiple generations NVM tapeout activities, layout supervision, chip planning, silicon debugging</p>\n</li>\n<li>\n<p>Excellent communication skills, ability to work well across multi-functional teams</p>\n</li>\n<li>\n<p>Fluent in all major CAD tools: SPICE, Cadence, Verilog simulation software</p>\n</li>\n<li>\n<p>Some knowledge of scripting such as Python&nbsp;</p>\n</li>\n<li>\n<p>Must be a self-starter, detail-oriented, and team player</p>\n</li>\n\n</div>"}],"salaryRange":{"min":170000,"max":240000,"currency":"USD","interval":"per-year-salary"},"text":"Senior NVM Designer","country":"US","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>Mythic was founded in 2012 by University of Michigan researchers Mike Henry and Dave Fick, who set out to answer a simple question: what if a chip worked the way the human brain does? That first-principles thinking became analog compute-in-memory&mdash;an architecture that processes data where it lives instead of shuttling it back and forth across power-hungry pathways. Today, that architecture is proving its value. Mythic is the only analog compute-in-memory platform delivering 100x efficiency gains for the innovators who need AI inference at scale without the unsustainable energy cost, with technology proven across data center, automotive, robotics, and defense applications. Backed by an oversubscribed $125M raise from investors including Honda, Lockheed Martin, SoftBank, and DCVC, we're scaling toward a 1,024-chiplet architecture built for the largest LLM workloads in the data center&mdash;taking on the GPU status quo directly. We don't sell what's coming. We sell proven technology that works today, built on a fundamentally different approach to computing that we&rsquo;ve been refining for over a decade. Intelligence is inevitable. How we get there is a choice. And Mythic is proving that power and efficiency were never a tradeoff to begin with.</p>\n</div>","descriptionBodyPlain":"","hostedUrl":"https://jobs.lever.co/mythic-ai.com/9a2f66be-66f0-4d76-afb8-c20c56755225","applyUrl":"https://jobs.lever.co/mythic-ai.com/9a2f66be-66f0-4d76-afb8-c20c56755225/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Palo Alto, CA","team":"Non-Volatile Memories","allLocations":["Palo Alto, CA"]},"createdAt":1787006886503,"descriptionPlain":"We are hiring an experienced digital designer to work on the next generation NVM (non-volatile memory) controller for analog compute-in memory technology.  The candidate will be responsible for the design, development, and verification of NVM IP and digital controllers for Mythic’s product architecture. This role collaborates closely with circuit, digital, compiler, firmware, and software teams to define NVM controller architecture, develop and validate behavioral models, and improve RTL design and verification methodologies.\n","description":"<div>\n<p>We are hiring an experienced digital designer to work on the next generation NVM (non-volatile memory) controller for analog compute-in memory technology.&nbsp; The candidate will be responsible for the design, development, and verification of NVM IP and digital controllers for Mythic’s product architecture. This role collaborates closely with circuit, digital, compiler, firmware, and software teams to define NVM controller architecture, develop and validate behavioral models, and improve RTL design and verification methodologies.</p>\n</div>","id":"e045e273-b539-413c-97e7-dfe75107b424","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p>Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available NVM technologies from foundries</p>\n</li>\n<li>\n<p>Contribute to next generation NVM digital controller</p>\n</li>\n<li>\n<p>Responsible for NVM digital controller design, definition, interface, and communications</p>\n</li>\n<li>\n<p>Work with NVM circuit designers for RNM, functional, and verilog models of NVM circuits</p>\n</li>\n<li>\n<p>Drive verifications of RNM and functional models of NVM circuits&nbsp;</p>\n</li>\n<li>\n<p>Participate in design reviews and contribute to improving RTL coding practices and methodologies.</p>\n</li>\n<li>\n<p>Work closely with digital, compiler, firmware, and software team to define NVM controller architecture</p>\n</li>\n\n</div>"},{"text":"What you'll bring","content":"<div>\n\n<li>\n<p>Ph.D. or MS degree in EE or related 3+ years industrial experience in RTL design, microarchitecture, and architecture development.</p>\n</li>\n<li>\n<p>Hands-on experience in full chip digital simulation setup, debugging, and verification</p>\n</li>\n<li>\n<p>Familiar and hands-on experience on NVM (NOR / NAND / similar) voltage operation and/or programming algorithms, and timing diagram is a plus</p>\n</li>\n<li>\n<p>Understanding of computer architecture fundamentals (pipelines, caches, coherence, memory hierarchies) is a plus.</p>\n</li>\n<li>\n<p>Experience with one or more of the following subsystems: scheduling fabrics, high-performance interconnects, DMA engines, memory controllers, or datapath/control logic is a plus.</p>\n</li>\n<li>\n<p>Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling</p>\n</li>\n<li>\n<p>Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines.</p>\n</li>\n<li>\n<p>Familiarity with timing constraints, physical design considerations, and EDA flows.</p>\n</li>\n<li>\n<p>Hands-on experience with simulation, synthesis, linting, and static timing analysis tools.</p>\n</li>\n<li>\n<p>Excellent communication skills, ability to work well across multi-functional teams</p>\n</li>\n\n</div>"}],"salaryRange":{"min":178000,"max":240000,"currency":"USD","interval":"per-year-salary"},"text":"Senior NVM Digital Designer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>We are hiring an experienced digital designer to work on the next generation NVM (non-volatile memory) controller for analog compute-in memory technology.&nbsp; The candidate will be responsible for the design, development, and verification of NVM IP and digital controllers for Mythic&rsquo;s product architecture. This role collaborates closely with circuit, digital, compiler, firmware, and software teams to define NVM controller architecture, develop and validate behavioral models, and improve RTL design and verification methodologies.</p>\n</div>","descriptionBodyPlain":"We are hiring an experienced digital designer to work on the next generation NVM (non-volatile memory) controller for analog compute-in memory technology.  The candidate will be responsible for the design, development, and verification of NVM IP and digital controllers for Mythic’s product architecture. This role collaborates closely with circuit, digital, compiler, firmware, and software teams to define NVM controller architecture, develop and validate behavioral models, and improve RTL design and verification methodologies.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/e045e273-b539-413c-97e7-dfe75107b424","applyUrl":"https://jobs.lever.co/mythic-ai.com/e045e273-b539-413c-97e7-dfe75107b424/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire&nbsp;smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Digital Design","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1759940391360,"descriptionPlain":"We’re hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nRTL Design at Mythic:\nAt Mythic, our RTL design team is at the heart of transforming our custom digital dataflow architecture into working silicon. This architecture incorporates a novel scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines. Together with our Analog Compute Engines, these critical technologies enable unprecedented efficiency for modern AI workloads. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.\n \nThe team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon groups to ensure every component integrates seamlessly into the full system. Because today’s AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply both creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.\n","description":"<div>We’re hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100× the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We’ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000–$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">RTL Design at Mythic:</strong></div>\n<div>At Mythic, our RTL design team is at the heart of transforming our custom digital dataflow architecture into working silicon. This architecture incorporates a novel scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines. Together with our Analog Compute Engines, these critical technologies enable unprecedented efficiency for modern AI workloads. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.</div>\n<div>&nbsp;</div>\n<div>The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon groups to ensure every component integrates seamlessly into the full system. Because today’s AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply both creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.</div>","id":"e32d9759-38db-41dd-96d2-867fc9be6ab2","lists":[{"text":"Responsibilities","content":"\n<li>Design and implement RTL for Mythic's next-generation AI processor.</li>\n<li>Contribute to the development of a novel digital dataflow architecture, including a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines.</li>\n<li>Develop and optimize high-performance, low-power components such as datapaths, controllers, memory subsystems, and interconnects.</li>\n<li>Collaborate with architects and verification engineers to define microarchitecture and ensure functional correctness.</li>\n<li>Drive timing closure by working closely with synthesis and physical design teams.</li>\n<li>Participate in design reviews and contribute to improving RTL coding practices and methodologies.</li>\n"},{"text":"Requirements","content":"\n<li>Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.</li>\n<li>8+ years of industry experience in RTL design, microarchitecture, and architecture development.</li>\n<li>Solid understanding of computer architecture fundamentals (pipelines, caches, coherence, memory hierarchies).</li>\n<li>Hands-on experience with one or more of the following subsystems: scheduling fabrics, high-performance interconnects, DMA engines, memory controllers, or datapath/control logic.</li>\n<li>Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines.</li>\n<li>Familiarity with timing constraints, physical design considerations, and EDA flows.</li>\n<li>Hands-on experience with simulation, synthesis, linting, and static timing analysis tools.</li>\n<li>Strong problem-solving and communication skills with ability to work in cross-functional teams.</li>\n"},{"text":"Preferred Qualifications","content":"\n<li>Familiarity with network-on-chip (NoC) architectures.</li>\n<li>Expertise in low-power design techniques (clock gating, power gating, multi-voltage domains).</li>\n<li>Experience with timing closure in advanced technology nodes and collaboration with physical design teams.</li>\n<li>Strong skills in performance modeling and trade-off analysis (PPA optimization).</li>\n<li>Hands-on experience with emulation/FPGA prototyping for early RTL validation.</li>\n<li>Familiarity with AI, DSP, or other parallel compute architectures.</li>\n<li>Strong scripting ability (Python or similar) for design automation and productivity.</li>\n"}],"text":"Senior RTL Design Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>We&rsquo;re hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">About Us:</strong></div>\n<div>Mythic is building the future of AI computing with breakthrough analog&nbsp;technology that delivers 100&times; the performance of traditional digital systems&nbsp;at the same power and cost. This unlocks bigger, more capable models and&nbsp;faster, more responsive applications - whether in edge devices like drones,&nbsp;robotics, and sensors, or in cloud and data center environments. Our&nbsp;technology powers everything from large language models and CNNs to&nbsp;advanced signal processing, and is engineered to operate from &ndash;40 &deg;C to +125 &deg;C, making it ideal for industrial, automotive, aerospace, and defense.</div>\n<div>&nbsp;</div>\n<div>We&rsquo;ve raised over $100M from world-class investors including Softbank,&nbsp;Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div>\n<div>&nbsp;</div>\n<div>The salary range for this position is $120,000&ndash;$225,000+ annually. Actual&nbsp;compensation depends on experience, skills, qualifications, and location.</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 18px;\">RTL Design at Mythic:</strong></div>\n<div>At Mythic, our RTL design team is at the heart of transforming our custom digital dataflow architecture into working silicon. This architecture incorporates a novel scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines. Together with our Analog Compute Engines, these critical technologies enable unprecedented efficiency for modern AI workloads. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.</div>\n<div>&nbsp;</div>\n<div>The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon groups to ensure every component integrates seamlessly into the full system. Because today&rsquo;s AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply both creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.</div>","descriptionBodyPlain":"We’re hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.\n \nAbout Us:\nMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n \nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n \nThe salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.\n \nRTL Design at Mythic:\nAt Mythic, our RTL design team is at the heart of transforming our custom digital dataflow architecture into working silicon. This architecture incorporates a novel scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines. Together with our Analog Compute Engines, these critical technologies enable unprecedented efficiency for modern AI workloads. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.\n \nThe team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon groups to ensure every component integrates seamlessly into the full system. Because today’s AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply both creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/e32d9759-38db-41dd-96d2-867fc9be6ab2","applyUrl":"https://jobs.lever.co/mythic-ai.com/e32d9759-38db-41dd-96d2-867fc9be6ab2/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\n","additional":"<div><span style=\"font-size: 16px;\">At Mythic, we foster a collaborative and respectful environment where&nbsp;people can do their best work. We hire smart, capable individuals, provide&nbsp;the tools and support they need, and trust them to deliver. Our team brings&nbsp;a wide range of experiences and perspectives, which we see as a strength in&nbsp;solving hard problems together. We value professionalism, creativity, and&nbsp;integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</span></div>","categories":{"commitment":"Full-time","department":"Hardware","location":"Austin, TX","team":"Digital Design","allLocations":["Austin, TX"]},"createdAt":1769031775847,"descriptionPlain":"About us:\n\nMythic is building the future of AI computing with breakthrough analog  technology that delivers 100× the performance of traditional digital systems  at the same power and cost. This unlocks bigger, more capable models and  faster, more responsive applications—whether in edge devices like drones,  robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nMythic's Digital Design Team is seeking a Silicon Emulation Engineer to support the development and validation of AI accelerator and AI-centric SoCs using hardware emulation platforms. This role is critical to enabling early bring-up, software validation, and performance analysis of neural network accelerators prior to silicon availability. The engineer will work closely with RTL, verification, compiler, firmware, and ML software teams to ensure functional correctness, performance targets, and system-level integration of AI workloads.\n","description":"<div><b>About us:</b></div><div><br></div><div>Mythic is building the future of AI computing with breakthrough analog&nbsp; technology that delivers 100× the performance of traditional digital systems&nbsp; at the same power and cost. This unlocks bigger, more capable models and&nbsp; faster, more responsive applications—whether in edge devices like drones,&nbsp; robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div><div><br></div><div>Mythic's Digital Design Team is seeking a&nbsp;<b>Silicon Emulation Engineer</b>&nbsp;to support the development and validation of&nbsp;<b>AI accelerator and AI-centric SoCs</b>&nbsp;using hardware emulation platforms. This role is critical to enabling&nbsp;<b>early bring-up, software validation, and performance analysis</b>&nbsp;of neural network accelerators prior to silicon availability. The engineer will work closely with RTL, verification, compiler, firmware, and ML software teams to ensure functional correctness, performance targets, and system-level integration of AI workloads.</div>","id":"db7047f8-f1a0-4cd2-8c9d-6442a5e306fd","lists":[{"text":"What You'll Do","content":"<li>Develop and maintain&nbsp;<b>emulation platforms</b>&nbsp;for AI accelerator / AI-centric SoCs</li><li>Integrate large-scale RTL (compute, DMA, memory subsystems, interconnects) into emulation environments</li><li>Enable&nbsp;<b>early firmware, driver, runtime, and ML stack bring-up</b>&nbsp;on emulated hardware</li><li>Support execution of&nbsp;<b>AI inference workloads</b>&nbsp;(e.g., CNNs, transformers) on emulated Mythic accelerators</li><li>Collaborate with compiler, runtime, and ML teams to debug&nbsp;<b>HW/SW co-design issues</b></li><li>Develop scripts and automation for emulation builds, regressions, and workload execution</li><li>Analyze&nbsp;<b>performance, bandwidth utilization, latency, and throughput</b>&nbsp;of AI workloads in emulation</li><li>Debug complex issues spanning RTL, firmware, drivers, and user-space ML frameworks</li><li>Support post-silicon correlation and performance validation when applicable</li><li>Document emulation flows, performance methodologies, and debug procedures</li>"},{"text":"What We're Looking For","content":"<li>Bachelor’s, Master's, or Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field</li><li>Strong understanding of&nbsp;<b>SoC architectures and AI accelerator design concepts</b></li><li>Experience with&nbsp;<b>RTL simulation and emulation</b>&nbsp;(Verilog/SystemVerilog)</li><li>Familiarity with&nbsp;<b>hardware emulation platforms (</b>e.g. Cadence Palladium)</li><li>Experience working in&nbsp;<b>Linux-based environments</b></li><li>Proficiency in scripting (Python, Tcl, Bash)</li><li>Strong debugging skills across hardware and software layers</li>"},{"text":"Nice to Have","content":"<li>Experience with&nbsp;<b>NPU, DSP, or GPU-class accelerators</b></li><li>Experience running or debugging&nbsp;<b>ML inference workloads</b>&nbsp;on pre-silicon platforms</li><li>Knowledge of&nbsp;<b>AI software stacks</b>&nbsp;(runtime, compiler, graph execution)</li><li>Familiarity with&nbsp;<b>DMA engines, memory hierarchies, and high-bandwidth interconnects</b></li><li>Understanding of&nbsp;<b>AXI/AMBA protocols</b>&nbsp;and cache coherency</li><li>Experience with FPGA prototyping or hybrid emulation flows</li><li>Exposure to performance modeling or architectural trade-off analysis</li>"}],"salaryRange":{"min":120000,"currency":"USD","interval":"per-year-salary","max":225000},"salaryDescription":"<div><span style=\"font-size: 13.3333px;\">The proposed salary range for this position is $120,000–$225,000 annually. Actual compensation depends on experience, skills, qualifications, and location.</span></div>","salaryDescriptionPlain":"The proposed salary range for this position is $120,000–$225,000 annually. Actual compensation depends on experience, skills, qualifications, and location.\n","text":"Senior Silicon Emulation Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div><b>About us:</b></div><div><br></div><div>Mythic is building the future of AI computing with breakthrough analog&nbsp; technology that delivers 100× the performance of traditional digital systems&nbsp; at the same power and cost. This unlocks bigger, more capable models and&nbsp; faster, more responsive applications—whether in edge devices like drones,&nbsp; robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.</div><div><br></div><div>We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar&nbsp;customer contracts across multiple markets.</div><div><br></div><div>Mythic's Digital Design Team is seeking a&nbsp;<b>Silicon Emulation Engineer</b>&nbsp;to support the development and validation of&nbsp;<b>AI accelerator and AI-centric SoCs</b>&nbsp;using hardware emulation platforms. This role is critical to enabling&nbsp;<b>early bring-up, software validation, and performance analysis</b>&nbsp;of neural network accelerators prior to silicon availability. The engineer will work closely with RTL, verification, compiler, firmware, and ML software teams to ensure functional correctness, performance targets, and system-level integration of AI workloads.</div>","descriptionBodyPlain":"About us:\n\nMythic is building the future of AI computing with breakthrough analog  technology that delivers 100× the performance of traditional digital systems  at the same power and cost. This unlocks bigger, more capable models and  faster, more responsive applications—whether in edge devices like drones,  robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.\n\nWe’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\n\nMythic's Digital Design Team is seeking a Silicon Emulation Engineer to support the development and validation of AI accelerator and AI-centric SoCs using hardware emulation platforms. This role is critical to enabling early bring-up, software validation, and performance analysis of neural network accelerators prior to silicon availability. The engineer will work closely with RTL, verification, compiler, firmware, and ML software teams to ensure functional correctness, performance targets, and system-level integration of AI workloads.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/db7047f8-f1a0-4cd2-8c9d-6442a5e306fd","applyUrl":"https://jobs.lever.co/mythic-ai.com/db7047f8-f1a0-4cd2-8c9d-6442a5e306fd/apply"},{"additionalPlain":"Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n \nWe look forward to reviewing your application!\n\n\nAt Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</div>\n<div>&nbsp;</div>\n<div>We look forward to reviewing your application!</div><div><br></div><div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Mythic India","location":"Bangalore","team":"System-on-Chip","allLocations":["Bangalore"]},"createdAt":1763571698680,"descriptionPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round, and has offices in Palo Alto (CA, USA), Austin (TX, USA) and in Bangalore (Karnataka, India).\n \nAbout the role: \nMythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is digital RTL design of Mythic's chips, but we are looking for individuals with strong computer architecture knowledge as well.\n \nYou will be the owner of all aspects of design and development for system-level blocks which form the SoC infrastructure. You will need to contribute, and ideally, have great ownership of, the architecture, microarchitecture, and RTL for a large high-performance system. Additionally, beyond defining what functionality these blocks provide, you will help drive methodologies to establish and enable first-pass success of these chips.\n \nBeyond digital RTL design for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the system architecture, software, DFT, and analog design teams at Mythic.\n","description":"<div><strong style=\"font-size: 24px;\">About us:</strong></div>\n<div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round, and has offices in Palo Alto (CA, USA), Austin (TX, USA) and in Bangalore (Karnataka, India).</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">About the role: </strong></div>\n<div>Mythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is digital RTL design of Mythic's chips, but we are looking for individuals with strong computer architecture knowledge as well.</div>\n<div>&nbsp;</div>\n<div>You will be the owner of all aspects of design and development for system-level blocks which form the SoC infrastructure. You will need to contribute, and ideally, have great ownership of, the architecture, microarchitecture, and RTL for a large high-performance system. Additionally, beyond defining what functionality these blocks provide, you will help drive methodologies to establish and enable first-pass success of these chips.</div>\n<div>&nbsp;</div>\n<div>Beyond digital RTL design for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the system architecture, software, DFT, and analog design teams at Mythic.</div>","id":"c79de972-9f57-4029-9e32-0f086819ed2a","lists":[{"text":"Here's the background we hope you have:","content":"\n<li>BS/MS/PhD in EE/CS/CSE</li>\n<li>3+ years of industry experience</li>\n<li>RTL, microarchitecture, and architecture experience on advanced SoCs</li>\n<li>Experience with Design for Test (DFT) and Design for Debug (DFD) logic such as fuse controllers, memory BIST, scan dump, etc.</li>\n<li>Experience with clocking and reset methodologies</li>\n<li>Understanding of timing constraints</li>\n"},{"text":"The following would be nice to have, but is not required:","content":"\n<li>Experience working at startups</li>\n<li>Experience with RTL design for clock domain crossings</li>\n<li>Experience with Python or Ruby</li>\n<li>Experience working with a regression system</li>\n<li>Experience working with a revision control system</li>\n<li>Comfortable working from command line</li>\n"}],"text":"Senior SoC RTL Design Engineer","country":"IN","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div><strong style=\"font-size: 24px;\">About us:</strong></div>\n<div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE&trade;) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round, and has offices in Palo Alto (CA, USA), Austin (TX, USA) and in Bangalore (Karnataka, India).</div>\n<div>&nbsp;</div>\n<div><strong style=\"font-size: 24px;\">About the role: </strong></div>\n<div>Mythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is digital RTL design of Mythic's chips, but we are looking for individuals with strong computer architecture knowledge as well.</div>\n<div>&nbsp;</div>\n<div>You will be the owner of all aspects of design and development for system-level blocks which form the SoC infrastructure. You will need to contribute, and ideally, have great ownership of, the architecture, microarchitecture, and RTL for a large high-performance system. Additionally, beyond defining what functionality these blocks provide, you will help drive methodologies to establish and enable first-pass success of these chips.</div>\n<div>&nbsp;</div>\n<div>Beyond digital RTL design for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the system architecture, software, DFT, and analog design teams at Mythic.</div>","descriptionBodyPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round, and has offices in Palo Alto (CA, USA), Austin (TX, USA) and in Bangalore (Karnataka, India).\n \nAbout the role: \nMythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is digital RTL design of Mythic's chips, but we are looking for individuals with strong computer architecture knowledge as well.\n \nYou will be the owner of all aspects of design and development for system-level blocks which form the SoC infrastructure. You will need to contribute, and ideally, have great ownership of, the architecture, microarchitecture, and RTL for a large high-performance system. Additionally, beyond defining what functionality these blocks provide, you will help drive methodologies to establish and enable first-pass success of these chips.\n \nBeyond digital RTL design for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the system architecture, software, DFT, and analog design teams at Mythic.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/c79de972-9f57-4029-9e32-0f086819ed2a","applyUrl":"https://jobs.lever.co/mythic-ai.com/c79de972-9f57-4029-9e32-0f086819ed2a/apply"},{"additionalPlain":"Why Mythic\nWork on ambitious AI hardware with real system complexity\nOwn critical hardware design at a company where your work directly impacts product delivery\nJoin a highly collaborative team solving hard engineering problems\nMove fast, make decisions, and build from first principles\nHave outsized impact in a role with real scope and visibility\n\n\nAt Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\"><strong>Why Mythic</strong></p>\n<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Work on ambitious AI hardware with real system complexity</li>\n</ul>\n<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Own critical hardware design at a company where your work directly impacts product delivery</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Join a highly collaborative team solving hard engineering problems</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Move fast, make decisions, and build from first principles</li>\n<li style=\"margin: 0in 0in 8pt 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Have outsized impact in a role with real scope and visibility</li>\n</ul>\n</div><div><br></div><div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Hardware Productization","location":"Austin, TX","team":"New Product Development","allLocations":["Austin, TX"]},"createdAt":1779287566119,"descriptionPlain":"Mythic is building next-generation AI hardware platforms that require tight integration between silicon, packaging, and system design. We are looking for a hands-on Senior Staff Systems Design Engineer to own and drive the design and implementation of our reference boards and hardware platforms.\nThis is not a maintenance role. This is a build role.\nWe want someone who can take evolving silicon capabilities, incomplete requirements, and system-level constraints and turn them into robust, manufacturable hardware designs. You will play a critical role in defining how Mythic delivers usable hardware platforms to customers and partners.\nThis role is ideal for someone who thrives in high-ownership environments and wants to work across silicon, integration, and manufacturing to build high-quality hardware systems. You should be equally comfortable designing boards, working with external vendors, and supporting bring-up and debug.\n","description":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Mythic is building next-generation AI hardware platforms that require tight integration between silicon, packaging, and system design. We are looking for a hands-on <strong>Senior Staff </strong><strong>Systems Design Engineer&nbsp;</strong>to own and drive the design and implementation of our reference boards and hardware platforms.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This is not a maintenance role. This is a build role.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">We want someone who can take evolving silicon capabilities, incomplete requirements, and system-level constraints and turn them into robust, manufacturable hardware designs. You will play a critical role in defining how Mythic delivers usable hardware platforms to customers and partners.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This role is ideal for someone who thrives in high-ownership environments and wants to work across silicon, integration, and manufacturing to build high-quality hardware systems. You should be equally comfortable designing boards, working with external vendors, and supporting bring-up and debug.</p>\n</div>","id":"a70ad183-8c00-4012-96a8-f157a0a94642","lists":[{"text":"What you’ll own","content":"<div>\n<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Own design and development of <strong>reference boards and hardware platforms</strong></li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Translate silicon capabilities into practical, high-quality system designs</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Drive schematic design and guide PCB layout (internally or with external partners)</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Own key hardware subsystems including power delivery, high-speed interfaces, and clocking</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Ensure signal integrity, power integrity, and overall system robustness</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Define and incorporate package-level constraints into board design</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Partner with OSATs and manufacturing vendors to ensure smooth package-to-board integration</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Support board bring-up and collaborate on debugging system-level issues</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Drive design for manufacturability (DFM) and readiness for prototype and production builds</li>\n<li style=\"margin: 0in 0in 8pt 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Work closely with integration, product, test, and packaging teams to ensure successful system deployment</li>\n\n<p style=\"margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This role ensures Mythic’s silicon can be transformed into robust, manufacturable, and deployable customer-ready hardware platforms.</p>\n</ul></div>"},{"text":"What we’re looking for","content":"<div>\n<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Significant experience in hardware or board-level design</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Strong background in high-speed digital design and power delivery</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience designing and bringing up complex PCBs</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Familiarity with PCB design tools (Altium, Cadence, or similar)</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Understanding of package-to-board interactions and system-level constraints</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Ability to operate in fast-moving, ambiguous environments</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Strong engineering judgment and attention to detail</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience working with external vendors (PCB, OSAT)</li>\n<li style=\"text-align: justify; margin: 0in 0in 8pt 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Builder mindset: you do not wait for perfect requirements — you create working systems</li>\n\n</ul></div>"},{"text":"Preferred Qualifications","content":"<div>\n<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience with AI/ML hardware or high-performance compute platforms</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Exposure to multi-die or chiplet-based systems</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Familiarity with thermal and mechanical considerations in hardware design</li>\n<li style=\"text-align: justify; margin: 0in 0in 8pt 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Experience supporting hardware through bring-up and early production</li>\n\n</ul></div>"},{"text":"What success looks like","content":"<div>\n<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Reference boards are robust, reliable, and require minimal re-spins</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Hardware platforms are easy to use, stable, and ready for integration</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Designs account for real-world constraints early, reducing downstream issues</li>\n<li style=\"text-align: justify; margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Strong collaboration with integration, product, and manufacturing teams</li>\n<li style=\"text-align: justify; margin: 0in 0in 8pt 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Smooth transition from prototype builds to manufacturable designs</li>\n\n</ul></div>"},{"text":"Why this role matters","content":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">At Mythic, hardware design is not just about schematics—it is how we deliver real, usable systems that showcase the full value of our silicon.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This role is central to turning silicon into working platforms that customers and partners can build on.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">You will directly influence hardware quality, usability, and readiness for deployment.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">If you want a role where you can build real systems, make critical design decisions, and have direct impact on product success, we should talk.</p>\n</div>"},{"text":"Compensation & Benefits","content":"<ul style=\"margin-bottom: 0in; margin-top: 0px;\">\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Competitive salary and equity</li>\n<li style=\"margin: 0in 0in 0in 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Health, Dental, Vision, 401(k)</li>\n<li style=\"margin: 0in 0in 8pt 0px; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Uncapped PTO</li>\n</ul>"}],"text":"Senior Systems Design Engineer","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">Mythic is building next-generation AI hardware platforms that require tight integration between silicon, packaging, and system design. We are looking for a hands-on <strong>Senior Staff </strong><strong>Systems Design Engineer&nbsp;</strong>to own and drive the design and implementation of our reference boards and hardware platforms.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This is not a maintenance role. This is a build role.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">We want someone who can take evolving silicon capabilities, incomplete requirements, and system-level constraints and turn them into robust, manufacturable hardware designs. You will play a critical role in defining how Mythic delivers usable hardware platforms to customers and partners.</p>\n<p style=\"text-align: justify; margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;\">This role is ideal for someone who thrives in high-ownership environments and wants to work across silicon, integration, and manufacturing to build high-quality hardware systems. You should be equally comfortable designing boards, working with external vendors, and supporting bring-up and debug.</p>\n</div>","descriptionBodyPlain":"Mythic is building next-generation AI hardware platforms that require tight integration between silicon, packaging, and system design. We are looking for a hands-on Senior Staff Systems Design Engineer to own and drive the design and implementation of our reference boards and hardware platforms.\nThis is not a maintenance role. This is a build role.\nWe want someone who can take evolving silicon capabilities, incomplete requirements, and system-level constraints and turn them into robust, manufacturable hardware designs. You will play a critical role in defining how Mythic delivers usable hardware platforms to customers and partners.\nThis role is ideal for someone who thrives in high-ownership environments and wants to work across silicon, integration, and manufacturing to build high-quality hardware systems. You should be equally comfortable designing boards, working with external vendors, and supporting bring-up and debug.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/a70ad183-8c00-4012-96a8-f157a0a94642","applyUrl":"https://jobs.lever.co/mythic-ai.com/a70ad183-8c00-4012-96a8-f157a0a94642/apply"},{"additionalPlain":"At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Software","location":"Austin, TX","team":"System Software","allLocations":["Austin, TX","Palo Alto, CA"]},"createdAt":1782954943108,"descriptionPlain":"Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\nMythic's analog compute hardware is a massive integration of analog and digital components on a single chip, with multiple cascaded digital and analog stages. The fundamental compute atomic is a vector-product that is entirely processed in the analog domain. So, analog impairments like ADC/DAC non-linearity and weight-noise directly impact the accuracy of the vector-multiply operation. Mitigation techniques for these impairments thus become critical and is the realm that the Systems Engineer operates in. Therefore, the Systems Engineer role maps directly onto skills from RF baseband, high-speed digital communication system design and RF sensing— think Wi-Fi, SerDes, gigabit Ethernet and sensor signal processing. \n\n","description":"<p data-renderer-start-pos=\"1\" data-local-id=\"202d8845805f\">Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</p>\n<p data-renderer-start-pos=\"1\" data-local-id=\"202d8845805f\"><em>Mythic's analog compute hardware is a massive integration of analog and digital components on a single chip, with multiple cascaded digital and analog stages. The fundamental compute atomic is a vector-product that is entirely processed in the analog domain. So, analog impairments like ADC/DAC non-linearity and weight-noise directly impact the accuracy of the vector-multiply operation. Mitigation techniques for these impairments thus become critical and is the realm that the Systems Engineer operates in. Therefore, the Systems Engineer role maps directly onto skills from RF baseband, high-speed digital communication system design and RF sensing— think Wi-Fi, SerDes, gigabit Ethernet and sensor signal processing.&nbsp;</em></p>\n<h3 data-local-id=\"9f2e054962b7\" data-renderer-start-pos=\"1498\" tabindex=\"-1\" id=\"The-Systems-Engineering-team\"></h3>","id":"b6ae0ef0-d6b3-4ab0-9f72-1f822938add1","lists":[{"text":"The Systems Engineering team","content":"<div>\n<ul data-local-id=\"d7629415-8bce-4f02-8167-c69eaf7bc71d\" data-indent-level=\"1\" style=\"list-style-type: disc;\">\n<li>\n<p data-renderer-start-pos=\"1530\" data-local-id=\"7bc77e913893\">Sits at the intersection of Analog, AI, Firmware and Silicon Productization,</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"1610\" data-local-id=\"308238ba7a75\">Models analog effects and their impact on neural network performance.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"1683\" data-local-id=\"9013084ce11b\">Develops signal-processing based solutions to mitigate impact of analog impairments on neural network accuracy</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"1797\" data-local-id=\"78b5234d8117\">Works cross-functionally to validate, debug, and optimize analog compute hardware.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"1883\" data-local-id=\"6eb0d719bfaa\">Contributes to the design of next-generation hardware.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"1941\" data-local-id=\"8fa7d859a755\">Brings up new silicon, characterizes silicon performance and develops effective approaches for silicon screening</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"2057\" data-local-id=\"b0056d30bbc3\">Builds frameworks for large-scale data capture and statistical error analysis for analog compute in the simulation domain and on actual silicon hardware</p>\n</li>\n\n</ul></div>"},{"text":"Here's what you will do","content":"<div>\n<ul data-local-id=\"87230080-8d31-46c6-ad4b-435cb392526e\" data-indent-level=\"1\" style=\"list-style-type: disc;\">\n<li>\n<p data-renderer-start-pos=\"2242\" data-local-id=\"1912ac7b1baf\">Own various aspects of algorithms and DSP blocks that optimize the performance of Mythic’s unique analog compute-in-memory technology from concept to customer deployment. This includes calibration loops, non-linearity compensation, offset-correction and estimation of residual-errors.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"2530\" data-local-id=\"004b710ebbac\">Work with model-training, compiler and firmware teams to productize these algorithms.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"2619\" data-local-id=\"f33d4e070ba0\">Write and modify firmware as needed to productize/debug algorithms</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"2689\" data-local-id=\"048e28820c1b\">Continually improve on the fidelity of our modeling and simulation environment to better predict silicon performance.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"2810\" data-local-id=\"780e4942190a\">Correlate errors seen on silicon to simulation models and contribute to improving the fidelity of our models for analog compute.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"2943\" data-local-id=\"a446b1e2ac5a\">Develop Python frameworks for data collection, error-analysis and quantify impact of analog impairments on neural-network accuracy</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3077\" data-local-id=\"4e217d789a26\">Silicon bring-up, Characterization and Performance-Optimization.</p>\n</li>\n\n</ul></div>"},{"text":"Here's the background you need to have","content":"<div>\n<ul data-local-id=\"f2a96608-2d23-42d0-ab53-17bea734b458\" data-indent-level=\"1\" style=\"list-style-type: disc;\">\n<li>\n<p data-renderer-start-pos=\"3187\" data-local-id=\"b6004a310507\">Bachelor's degree in Electrical Engineering, Computer Engineering, Mathematics, Physics or a related field.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3298\" data-local-id=\"2e9a3b01b1fd\">At least 5 years experience in production DSP or RF baseband engineering (&lt; 3 years if Ph.D or M.S.)</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3402\" data-local-id=\"9db9425e5f56\">Strong familiarity with production Python coding,&nbsp;including object oriented and/or functional programming</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3511\" data-local-id=\"03c085df7b60\">Strong familiarity with core DSP concepts, including frequency domain analysis, filtering, statistical signal processing and estimation theory</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3657\" data-local-id=\"b4937b60b4c2\">Track record of shipping silicon with DSP or RF/Analog sub-systems.&nbsp;</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3729\" data-local-id=\"99d6d89544e4\">Understanding of linear algebra concepts, including matrix math and&nbsp;linear regression.&nbsp;</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3820\" data-local-id=\"db5d2be6d1ad\">Comfort with large-scale collection and processing of signals.&nbsp;</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3887\" data-local-id=\"3dd8d41b6589\">Commitment to quality and engineering excellence.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"3940\" data-local-id=\"773ad22a6e66\">Strong communication skills.</p>\n</li>\n\n</ul></div>"},{"text":"The following would be nice to have","content":"<div>\n<ul data-local-id=\"b958cb1a-8c28-4575-8c8c-b92ac06716cc\" data-indent-level=\"1\" style=\"list-style-type: disc;\">\n<li>\n<p data-renderer-start-pos=\"4011\" data-local-id=\"e92072769595\">MS/PhD in Electrical Engineering, Computer Science, Mathematics, Physics or related field.</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"4105\" data-local-id=\"e647869d1cf8\">Experience with RF calibration and silicon-bringup in the high-speed communication space</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"4197\" data-local-id=\"ff76646df6c6\">Strong familiarity with NumPy/SciPy (or experience with Numpy and strong familiarity with MATLAB for DSP).</p>\n</li>\n<li>\n<p data-renderer-start-pos=\"4307\" data-local-id=\"cb5f241fc06a\">Familiarity with state-of-the-art neural network architectures</p>\n</li>\n\n</ul></div>"}],"salaryRange":{"min":150000,"max":275000,"currency":"USD","interval":"per-year-salary"},"salaryDescription":"<div>Compensation is based on a variety of factors, including but not limited to: location, education, and years of experience.</div>","salaryDescriptionPlain":"Compensation is based on a variety of factors, including but not limited to: location, education, and years of experience.\n","text":"Senior Systems Engineer - Signal Processing, Algorithms and Characterization","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<p data-local-id=\"202d8845805f\" data-renderer-start-pos=\"1\">Mythic is building the future of AI computing with breakthrough analog technology that delivers 100&times; the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications&mdash;whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from &ndash;40 &deg;C to +125 &deg;C, making it ideal for industrial, automotive, aerospace, and defense. We&rsquo;ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.</p>\n<p data-local-id=\"202d8845805f\" data-renderer-start-pos=\"1\"><em>Mythic's analog compute hardware is a massive integration of analog and digital components on a single chip, with multiple cascaded digital and analog stages. The fundamental compute atomic is a vector-product that is entirely processed in the analog domain. So, analog impairments like ADC/DAC non-linearity and weight-noise directly impact the accuracy of the vector-multiply operation. Mitigation techniques for these impairments thus become critical and is the realm that the Systems Engineer operates in. Therefore, the Systems Engineer role maps directly onto skills from RF baseband, high-speed digital communication system design and RF sensing&mdash; think Wi-Fi, SerDes, gigabit Ethernet and sensor signal processing.&nbsp;</em></p>\n<h3 id=\"The-Systems-Engineering-team\" tabindex=\"-1\" data-renderer-start-pos=\"1498\" data-local-id=\"9f2e054962b7\"></h3>","descriptionBodyPlain":"Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.\nMythic's analog compute hardware is a massive integration of analog and digital components on a single chip, with multiple cascaded digital and analog stages. The fundamental compute atomic is a vector-product that is entirely processed in the analog domain. So, analog impairments like ADC/DAC non-linearity and weight-noise directly impact the accuracy of the vector-multiply operation. Mitigation techniques for these impairments thus become critical and is the realm that the Systems Engineer operates in. Therefore, the Systems Engineer role maps directly onto skills from RF baseband, high-speed digital communication system design and RF sensing— think Wi-Fi, SerDes, gigabit Ethernet and sensor signal processing. \n\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/b6ae0ef0-d6b3-4ab0-9f72-1f822938add1","applyUrl":"https://jobs.lever.co/mythic-ai.com/b6ae0ef0-d6b3-4ab0-9f72-1f822938add1/apply"},{"additionalPlain":"At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Mythic India","location":"Bangalore","team":"System-on-Chip","allLocations":["Bangalore"]},"createdAt":1772174477983,"descriptionPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).\n\nAbout This Role:\nMythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of DFT features on Mythic's chips. \n\nYou will be the working on all aspects of DFT for sub-system-level blocks which form the SoC. You will need to contribute, and ideally, have ownership of all the aspects of DFT such as MBIST, IJTAG, Scan and ATPG . You will contribute to the methodology development to establish flow for all DFT features and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.\n\nBeyond DFT for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.\n","description":"<div><b style=\"font-size: 24px;\">About us:</b></div><div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).</div><div><br></div><div><b style=\"font-size: 24px;\">About This Role:</b></div><div>Mythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of&nbsp;DFT&nbsp;features on Mythic's chips.&nbsp;</div><div><br></div><div>You will be the working on all aspects of&nbsp;DFT&nbsp;for sub-system-level blocks which form the SoC. You will need to contribute, and ideally, have ownership of all the aspects of&nbsp;DFT&nbsp;such as MBIST, IJTAG, Scan and ATPG . You will contribute to the methodology development to establish flow for all&nbsp;DFT&nbsp;features and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.</div><div><br></div><div>Beyond&nbsp;DFT&nbsp;for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.</div>","id":"5a5aff34-c322-4bc9-abb7-f0fdda3f728e","lists":[{"text":"Here is what you will do:","content":"<li>BS/MS/PhD in EE/ECE</li><li>At least 3+ years of industry experience</li><li>Understanding of Design for Test methodologies and&nbsp;DFT&nbsp;experience (e.g. JTAG 1149.x, IEEE 1500, IEEE 1687 iJTAG, Scan, ATPG, Memory BIST)</li><li>Experience with SoC Level&nbsp;DFT&nbsp;Integration, Verification and RTL design for&nbsp;DFT</li><li>Experience with&nbsp;DFT&nbsp;strategies like Scan insertion, TPI, SSN, Hierarchical&nbsp;DFT&nbsp;and ATPG</li><li>Pre-Silicon test planning &amp; verification strategy</li><li>Knowledge &amp; experience of low power concepts, clock gating, power gating is a plus</li><li>Adept at root cause analysis and resolving&nbsp;DFT&nbsp;implementation issues</li><li>Must have good communication skills and the ability to work in a worldwide team environment</li><li>A past experience of working on an AI processor design is a huge plus</li>"},{"text":"Here is the background we hope you have:","content":"<li>Experience working at startups</li><li>Knowledge of Low power&nbsp;DFT&nbsp;solutions</li><li>Experience of working with STA team to define&nbsp;DFT&nbsp;timing constraints</li><li>Working with ATE (Automatic Test Equipment) for bring-up, debugging, and yield improvement</li><li>Proficiency in Synopsys (TetraMAX/DFT&nbsp;Compiler) or Siemens/Mentor (Tessent) tools, Verilog/SystemVerilog</li><li>Good script skills including Perl, Tcl, Python, etc.</li>"},{"text":"The following would be nice to have, but is not required: ","content":"<li>Knowledge of <b>chiplet-based design limitations</b> and their impact on physical design.</li><li>Experience in Sub-10nm designs</li><li>Familiarity and hands-on experience with <b>Cadence toolsets</b>.</li>"}],"text":"Sr DFT Engineer","country":"IN","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div><b style=\"font-size: 24px;\">About us:</b></div><div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).</div><div><br></div><div><b style=\"font-size: 24px;\">About This Role:</b></div><div>Mythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of&nbsp;DFT&nbsp;features on Mythic's chips.&nbsp;</div><div><br></div><div>You will be the working on all aspects of&nbsp;DFT&nbsp;for sub-system-level blocks which form the SoC. You will need to contribute, and ideally, have ownership of all the aspects of&nbsp;DFT&nbsp;such as MBIST, IJTAG, Scan and ATPG . You will contribute to the methodology development to establish flow for all&nbsp;DFT&nbsp;features and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.</div><div><br></div><div>Beyond&nbsp;DFT&nbsp;for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.</div>","descriptionBodyPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).\n\nAbout This Role:\nMythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of DFT features on Mythic's chips. \n\nYou will be the working on all aspects of DFT for sub-system-level blocks which form the SoC. You will need to contribute, and ideally, have ownership of all the aspects of DFT such as MBIST, IJTAG, Scan and ATPG . You will contribute to the methodology development to establish flow for all DFT features and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.\n\nBeyond DFT for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/5a5aff34-c322-4bc9-abb7-f0fdda3f728e","applyUrl":"https://jobs.lever.co/mythic-ai.com/5a5aff34-c322-4bc9-abb7-f0fdda3f728e/apply"},{"additionalPlain":"At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Mythic India","location":"Bangalore","team":"System-on-Chip","allLocations":["Bangalore"]},"createdAt":1772174117670,"descriptionPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).\n\nAbout This Role:\nMythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of DFT features on Mythic's chips. \n\nYou will lead end-to-end Design for Testability (DFT) implementation, verification for complex ASIC/SoC designs. You will own all aspects of DFT for SoC such as MBIST, IJTAG, Scan and ATPG .\nYou will also contribute significantly to DFT methodologies to establish flow for all DFT features like MBIST,SCAN and ATPG and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.\n\nBeyond DFT for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.\n","description":"<div><b style=\"font-size: 24px;\">About us:</b></div><div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).</div><div><br></div><div><b style=\"font-size: 24px;\">About This Role:</b></div><div>Mythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of&nbsp;DFT&nbsp;features on Mythic's chips.&nbsp;</div><div><br></div><div>You will lead end-to-end Design for Testability (DFT) implementation, verification for complex ASIC/SoC designs. You will own all aspects of&nbsp;DFT&nbsp;for SoC such as MBIST, IJTAG, Scan and ATPG .</div><div>You will also contribute significantly to&nbsp;DFT&nbsp;methodologies to establish flow for all&nbsp;DFT&nbsp;features like MBIST,SCAN and ATPG and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.</div><div><br></div><div>Beyond&nbsp;DFT&nbsp;for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.</div>","id":"26a542d0-2a07-4898-a5e5-1fc2ca13d751","lists":[{"text":"Here is what you will do:","content":"<li>BS/MS/PhD in EE/ECE</li><li>At least 8+ years of industry experience</li><li>SoC level experience in&nbsp;DFT&nbsp;methodologies (e.g. Memory Repair, Hierarchical&nbsp;DFT, IEEE 1687 iJTAG, Scan, ATPG, Memory BIST.</li><li>Experience with SoC Level&nbsp;DFT&nbsp;Integration, Verification,&nbsp;DFT&nbsp;test suite development and RTL design for&nbsp;DFT.</li><li>Experience with SoC Level&nbsp;DFT&nbsp;Integration, Verification and RTL design for&nbsp;DFT</li><li>Experience with&nbsp;DFT&nbsp;strategies like Scan insertion, TPI, SSN, Hierarchical&nbsp;DFT&nbsp;and ATPG</li><li>Pre-Silicon test planning &amp; verification strategy</li><li>Knowledge &amp; experience of low power concepts, clock gating, power gating is a plus</li><li>Adept at root cause analysis and resolving&nbsp;DFT&nbsp;implementation issues</li><li>Must have good communication skills and the ability to work in a worldwide team environment</li><li>A past experience of working on an AI processor design is a huge plus.</li>"},{"text":"Here is the background we hope you have:","content":"<li>Experience working at startups</li><li>Knowledge of Low power&nbsp;DFT&nbsp;solutions</li><li>Experience of working with STA team to define&nbsp;DFT&nbsp;timing constraints</li><li>Working with ATE (Automatic Test Equipment) for bring-up, debugging, and yield improvement</li><li>Proficiency in Synopsys (TetraMAX/DFT&nbsp;Compiler) or Siemens/Mentor (Tessent) tools, Verilog/SystemVerilog</li><li>Good script skills including Perl, Tcl, Python, etc.</li>"},{"text":"The following would be nice to have, but is not required: ","content":"<li>Knowledge of <b>chiplet-based design limitations</b> and their impact on physical design.</li><li>Experience in Sub-10nm designs</li><li>Familiarity and hands-on experience with <b>Cadence toolsets</b>.</li>"}],"text":"Sr Staff /Staff DFT Engineer","country":"IN","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div><b style=\"font-size: 24px;\">About us:</b></div><div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).</div><div><br></div><div><b style=\"font-size: 24px;\">About This Role:</b></div><div>Mythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of&nbsp;DFT&nbsp;features on Mythic's chips.&nbsp;</div><div><br></div><div>You will lead end-to-end Design for Testability (DFT) implementation, verification for complex ASIC/SoC designs. You will own all aspects of&nbsp;DFT&nbsp;for SoC such as MBIST, IJTAG, Scan and ATPG .</div><div>You will also contribute significantly to&nbsp;DFT&nbsp;methodologies to establish flow for all&nbsp;DFT&nbsp;features like MBIST,SCAN and ATPG and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.</div><div><br></div><div>Beyond&nbsp;DFT&nbsp;for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.</div>","descriptionBodyPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).\n\nAbout This Role:\nMythic is a fast-paced startup looking for individuals that enjoy wide-reaching and flexible roles. The primary responsibility for this position is implementaiton of DFT features on Mythic's chips. \n\nYou will lead end-to-end Design for Testability (DFT) implementation, verification for complex ASIC/SoC designs. You will own all aspects of DFT for SoC such as MBIST, IJTAG, Scan and ATPG .\nYou will also contribute significantly to DFT methodologies to establish flow for all DFT features like MBIST,SCAN and ATPG and enable first-pass success of these chips. You are expected to be involved and contribute to every phase of the design cycle from Concept to Silicon.\n\nBeyond DFT for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art deep neural networks (DNNs). You will also be collaborating with the RTL design , Physical design, STA and analog design teams at Mythic.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/26a542d0-2a07-4898-a5e5-1fc2ca13d751","applyUrl":"https://jobs.lever.co/mythic-ai.com/26a542d0-2a07-4898-a5e5-1fc2ca13d751/apply"},{"additionalPlain":"At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.\n\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n\nWe look forward to reviewing your application!","additional":"<div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div><div><br></div><div><span style=\"font-size: 10.5pt;\">Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</span></div><div><br></div><div><span style=\"font-size: 10.5pt;\">We look forward to reviewing your application! </span></div>","categories":{"commitment":"Full-time","department":"Mythic India","location":"Bangalore","team":"System-on-Chip","allLocations":["Bangalore"]},"createdAt":1765922026274,"descriptionPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).\n\nAbout This Role:\nMythic is a fast-paced AI startup seeking passionate engineers who thrive in dynamic environments and embrace broad, flexible roles. We are looking for hands-on Physical Design Engineers eager to push boundaries in advanced technology nodes. This role is for Mythic’s Bangalore design center, but as part of our global workforce across geographies, you will drive innovation by working closely with the RTL and Technology teams and contribute to producing high-quality designs through first-pass silicon success.\nWith end-to-end ownership, you’ll tackle challenges in physical design with a focus on scalability, speed of execution, and efficiency in a fast-moving AI hardware landscape, with a strong emphasis on analog IP integration. This role is for experienced, seasoned engineers who are well-versed in PD flows, with a proven record of execution, and who are driven to push the envelope and find innovative solutions to complex implementation challenges at both the subsystem and chip levels.\n","description":"<div><b style=\"font-size: 24px;\">About us:</b></div><div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).</div><div><br></div><div><b style=\"font-size: 24px;\">About This Role:</b></div><div>Mythic is a fast-paced AI startup seeking passionate engineers who thrive in dynamic environments and embrace broad, flexible roles. We are looking for hands-on Physical Design Engineers eager to push boundaries in advanced technology nodes. This role is for Mythic’s Bangalore design center, but as part of our global workforce across geographies, you will drive innovation by working closely with the RTL and Technology teams and contribute to producing high-quality designs through first-pass silicon success.</div><div>With end-to-end ownership, you’ll tackle challenges in physical design with a focus on scalability, speed of execution, and efficiency in a fast-moving AI hardware landscape, with a strong emphasis on analog IP integration. This role is for experienced, seasoned engineers who are well-versed in PD flows, with a proven record of execution, and who are driven to push the envelope and find innovative solutions to complex implementation challenges at both the subsystem and chip levels.</div>","id":"583fdf07-b48b-43d2-8a93-b1005229bfdc","lists":[{"text":"Here is what you will do:","content":"<li>Participate in the development of <b>Physical Design (PD) methodologies</b> across the RTL-to-GDSII flow using industry-standard tools (Cadence, Synopsys, Mentor).</li><li>Perform lead level hands-on work in one or more areas including <b>Synthesis, Formal Equivalence, Place &amp; Route (PnR), Static Timing Analysis (STA), DRC/LVS/IR/EM Signoff</b> at both module and top level.</li><li>Take full <b>ownership of the physical design process</b> at the module level and provide support in top-level integration, collaborating closely with RTL designers, DFT teams, and fabrication partners.</li><li>Provide <b>technical mentorship</b>, guiding team members and managing PD team interactions to ensure successful SoC implementation.</li><li>Drive <b>PPA optimization</b>, including low-power clock tree design for high-performance systems, and achieve timing closure across multiple corners and use cases.</li><li>Champion an <b>automation-first approach</b>, developing methodologies in TCL, PERL, or Python to significantly improve team efficiency.</li>"},{"text":"Here is the background we hope you have:","content":"<li><a rel=\"noopener noreferrer\" class=\"postings-link\" href=\"http://B.Tech/M.Tech/PhD\">B.Tech/M.Tech/PhD</a> in Electrical Engineering (<b>EE</b>) or Electronics &amp; Communication Engineering (<b>ECE</b>).</li><li><b>10+ years of experience</b> in the Physical Design domain.</li><li>Deep expertise in one or more areas (Synthesis, Formal Equivalence, PnR, STA, DRC/LVS/IR/EM signoff) with strong working knowledge of the entire PD flow.</li><li>Proven track record of successful tapeouts for <b>multi-million gate, multi-hierarchy designs</b> at advanced nanometer technology nodes.</li><li>Solid understanding and preferably hands-on experience in <b>low-power design and implementation strategies</b>.</li><li>Strong background in <b>automation of PD methodologies</b> using TCL, PERL, or Python.</li><li>Willingness to expand beyond core expertise, with a <b>team-oriented, can-do attitude</b> and commitment to mastering the full RTL-to-GDSII flow.</li>"},{"text":"The following would be nice to have, but is not required: ","content":"<li>Knowledge of <b>chiplet-based design limitations</b> and their impact on physical design.</li><li>Experience in Sub-10nm designs</li><li>Familiarity and hands-on experience with <b>Cadence toolsets</b>.</li>"}],"text":"Sr Staff/ Staff Engineer: Physical Design","country":"IN","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div><b style=\"font-size: 24px;\">About us:</b></div><div>Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).</div><div><br></div><div><b style=\"font-size: 24px;\">About This Role:</b></div><div>Mythic is a fast-paced AI startup seeking passionate engineers who thrive in dynamic environments and embrace broad, flexible roles. We are looking for hands-on Physical Design Engineers eager to push boundaries in advanced technology nodes. This role is for Mythic’s Bangalore design center, but as part of our global workforce across geographies, you will drive innovation by working closely with the RTL and Technology teams and contribute to producing high-quality designs through first-pass silicon success.</div><div>With end-to-end ownership, you’ll tackle challenges in physical design with a focus on scalability, speed of execution, and efficiency in a fast-moving AI hardware landscape, with a strong emphasis on analog IP integration. This role is for experienced, seasoned engineers who are well-versed in PD flows, with a proven record of execution, and who are driven to push the envelope and find innovative solutions to complex implementation challenges at both the subsystem and chip levels.</div>","descriptionBodyPlain":"About us:\nMythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).\n\nAbout This Role:\nMythic is a fast-paced AI startup seeking passionate engineers who thrive in dynamic environments and embrace broad, flexible roles. We are looking for hands-on Physical Design Engineers eager to push boundaries in advanced technology nodes. This role is for Mythic’s Bangalore design center, but as part of our global workforce across geographies, you will drive innovation by working closely with the RTL and Technology teams and contribute to producing high-quality designs through first-pass silicon success.\nWith end-to-end ownership, you’ll tackle challenges in physical design with a focus on scalability, speed of execution, and efficiency in a fast-moving AI hardware landscape, with a strong emphasis on analog IP integration. This role is for experienced, seasoned engineers who are well-versed in PD flows, with a proven record of execution, and who are driven to push the envelope and find innovative solutions to complex implementation challenges at both the subsystem and chip levels.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/583fdf07-b48b-43d2-8a93-b1005229bfdc","applyUrl":"https://jobs.lever.co/mythic-ai.com/583fdf07-b48b-43d2-8a93-b1005229bfdc/apply"},{"additionalPlain":"","additional":"<div>\n<div>At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.</div>\n<div>&nbsp;</div>\n<div>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</div>\n<div>&nbsp;</div>\n</div>","categories":{"commitment":"Full-time","department":"General & Administrative","location":"Palo Alto, CA","team":"People","allLocations":["Palo Alto, CA"]},"createdAt":1785171659264,"descriptionPlain":"","description":"<div>Mythic is looking for a Senior Recruiter with deep, hands-on experience hiring for the semiconductor industry to own full-cycle recruiting for some of our most technical and highest-impact roles. You'll partner directly with hiring managers, engineering leaders, and executives to build hiring strategy for hard-to-fill positions across chip design, process engineering, and silicon validation — and you'll bring the industry fluency and network needed to find and close candidates other recruiters can't reach.</div>","id":"097bb0b7-09ce-4eac-bfa9-853626e97970","lists":[{"text":"What you'll do","content":"<div>\n\n<li>\n<p>Own full-cycle recruiting for technical and leadership roles across the semiconductor org, including RTL/design engineers, process integration engineers, device physicists, packaging engineers, test and validation engineers, and technical program managers.</p>\n</li>\n<li>\n<p>Act as a strategic partner to hiring managers and senior leaders, advising on market conditions, compensation benchmarking, org design, and hiring strategy rather than just sourcing against a req.</p>\n</li>\n<li>\n<p>Build and maintain a strong personal network and talent pipeline across semiconductor companies, fabs, and adjacent industries (EDA, foundry, equipment, materials).</p>\n</li>\n<li>\n<p>Lead sourcing strategy for niche and passive candidates, using deep knowledge of semiconductor sub-disciplines (analog/mixed-signal, digital design, DFT, CMOS process, packaging, yield/reliability) to identify qualified talent.</p>\n</li>\n<li>\n<p>Manage a high volume of concurrent searches, including confidential and executive-level searches, with minimal oversight.</p>\n</li>\n<li>\n<p>Drive an excellent candidate experience from first contact through offer and close, including offer strategy and negotiation.</p>\n</li>\n<li>\n<p>Serve as a subject matter expert internally on semiconductor talent markets, compensation trends, and competitor landscape.</p>\n</li>\n<li>\n<p>Mentor and support junior recruiters and coordinators; contribute to TA process improvement, tooling, and employer branding initiatives.</p>\n</li>\n<li>\n<p>Partner with HR and compensation teams to structure competitive, equitable offers in a highly competitive talent market.</p>\n</li>\n\n</div>"},{"text":"What you'll bring ","content":"<div>\n\n<li>\n<p>5-8 years of full-cycle recruiting experience, with a significant, demonstrated focus on the semiconductor industry.</p>\n</li>\n<li>\n<p>Proven track record recruiting for technical semiconductor roles (e.g., design, process/integration, product/test engineering, packaging, CAD/EDA, or manufacturing).</p>\n</li>\n<li>\n<p>Strong existing network of semiconductor talent and fluency in industry-specific technical terminology, org structures, and career paths.</p>\n</li>\n<li>\n<p>Experience partnering with senior technical leaders (Director+) on hiring strategy, headcount planning, and org design.</p>\n</li>\n<li>\n<p>Track record of closing passive, competitive candidates in a tight talent market.</p>\n</li>\n<li>\n<p>Deep knowledge of compensation structures and equity/leveling practices common in semiconductor and broader hardware/tech companies.</p>\n</li>\n<li>\n<p>Excellent stakeholder management, communication, and negotiation skills.</p>\n</li>\n<li>\n<p>Experience with applicant tracking systems (e.g., Greenhouse, Lever, Ashby) and sourcing tools (LinkedIn Recruiter, etc.).</p>\n</li>\n<li>\n<p>Ability to manage a high-volume, high-complexity req load independently.</p>\n</li>\n\n</div>"}],"salaryRange":{"min":135000,"max":220000,"currency":"USD","interval":"per-year-salary"},"text":"Sr. Recruiter","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>Mythic is looking for a Senior Recruiter with deep, hands-on experience hiring for the semiconductor industry to own full-cycle recruiting for some of our most technical and highest-impact roles. You'll partner directly with hiring managers, engineering leaders, and executives to build hiring strategy for hard-to-fill positions across chip design, process engineering, and silicon validation &mdash; and you'll bring the industry fluency and network needed to find and close candidates other recruiters can't reach.</div>","descriptionBodyPlain":"","hostedUrl":"https://jobs.lever.co/mythic-ai.com/097bb0b7-09ce-4eac-bfa9-853626e97970","applyUrl":"https://jobs.lever.co/mythic-ai.com/097bb0b7-09ce-4eac-bfa9-853626e97970/apply"},{"additionalPlain":"","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"General & Administrative","location":"Hannover","team":"IT","allLocations":["Hannover"]},"createdAt":1787589946798,"descriptionPlain":"","description":"<div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100x the performance of traditional digital systems at the same power and cost. Our Hannover team, videantis GmbH, brings deep computer vision and video processing expertise to that mission, and we are hiring a System Administrator to be the IT and infrastructure owner on the ground there. You will keep a highly technical engineering site running day to day, covering servers, network, storage, endpoints, corporate applications, licenses and user support, while leading the local side of a substantial integration program that brings Hannover onto Mythic's global identity, collaboration, source control and security standards. This is a broad, hands-on role with real autonomy: you are the site's IT function, backed by a global IT and DevOps team in the US that you will work with daily. You will report to Mythic's Director of IT &amp; DevOps and partner closely with the Managing Director of videantis GmbH.</div>","id":"1c440df0-1f89-46b2-a6bb-8526d4018a08","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p>Own day-to-day IT operations for the Hannover site: user support, onboarding and offboarding, laptops and workstations, meeting room and AV, printers, and physical office IT.</p>\n</li>\n<li>\n<p>Be the local administrator for Mythic's corporate application stack, including Okta and MFA enrollment, Google Workspace, Microsoft 365, Slack, Zoom and Zoom Rooms, Box, and Atlassian (Jira, Confluence and Jira Service Management), and act as the local approver and first line for access requests.</p>\n</li>\n<li>\n<p>Administer and maintain the local Linux server, storage, network and firewall environment, including patching, monitoring, backup configuration and tested restores. The Hannover estate is Ubuntu-based; Mythic's wider fleet also includes a RHEL-family (Rocky/RHEL) track for EDA compute that you will interact with.</p>\n</li>\n<li>\n<p>Build and maintain the site's first complete server, workstation, application and license inventory. None exists today, and it is a prerequisite for most of the work below.</p>\n</li>\n<li>\n<p>Support the engineering environment the Hannover team depends on: Ubuntu and Windows workstations, self-hosted GitLab and CI runners, the v-NN SDK build flow, SVN/CVS and Git repositories, and local simulation and design tool licensing (Cadence, Siemens/Questa, Synopsys, X-Formation license manager).</p>\n</li>\n<li>\n<p>Lead the Hannover side of the Mythic integration workstreams: Nextcloud to Box and Confluence, STRATO email and hosting to Google Workspace, domain and DNS to Route 53, GitLab to GitHub, and local task and customer support tooling to Jira and Jira Service Management.</p>\n</li>\n<li>\n<p>Operate and support the site-to-site VPN and network interconnect to Mythic's Austin datacenter, and work with the US DevOps team on network redesign, subnet renumbering and migration to a centrally managed network stack.</p>\n</li>\n<li>\n<p>Implement Mythic's global security and endpoint standards locally: SSO and MFA, NinjaOne UEM enrollment, disk encryption with key escrow, patch SLAs, elimination of shared accounts, access logging, and the evidence required for foundry and customer security audits.</p>\n</li>\n<li>\n<p>Handle local IT vendor and license management, hardware procurement and asset tracking, and support GDPR-compliant data handling in coordination with Mythic Legal and outside counsel.</p>\n</li>\n<li>\n<p>Document the environment thoroughly and act as the local escalation point and bridge between the Hannover team and Mythic's global IT and DevOps organization.</p>\n</li>\n\n</div>"},{"text":"What you'll bring","content":"<div>\n\n<li>\n<p>5+ years of system administration experience, ideally as the primary IT owner for a site or small company. Completed Ausbildung as Fachinformatiker, a relevant degree, or equivalent practical experience.</p>\n</li>\n<li>\n<p>Strong Linux administration skills, with depth in Debian/Ubuntu; familiarity with the RHEL family (RHEL, CentOS, Rocky) is a plus, since Mythic's EDA compute runs on it.</p>\n</li>\n<li>\n<p>Hands-on administration of a modern corporate SaaS stack: an identity provider (Okta or equivalent SSO and MFA), Google Workspace and/or Microsoft 365, Slack, Zoom, and a cloud content platform such as Box.</p>\n</li>\n<li>\n<p>Solid Windows and macOS endpoint support and experience with an MDM or UEM platform, since employee laptops are Mac or Windows.</p>\n</li>\n<li>\n<p>Practical networking experience: firewalls, VPN, VLANs, DNS and DHCP, and comfort troubleshooting connectivity across sites.</p>\n</li>\n<li>\n<p>Experience with virtualization, file and NFS/SMB storage, and backup and recovery, including actually testing restores.</p>\n</li>\n<li>\n<p>Scripting and automation ability (Bash, Python, PowerShell, Ansible or similar) and a preference for automating repeat work.</p>\n</li>\n<li>\n<p>Experience supporting software or hardware engineering teams: version control systems including Git and older systems such as SVN or CVS, build and CI systems, containers, and technical license servers. Semiconductor or embedded engineering environment experience is a plus.</p>\n</li>\n<li>\n<p>Experience running platform migrations, ideally including email, file storage or source control, with minimal disruption to a technical user base.</p>\n</li>\n<li>\n<p>Fluent German and professional working English, and the communication skills to be the trusted IT person for a small, senior engineering team while working closely with colleagues eight time zones away.</p>\n</li>\n<li>\n<p>Comfortable with ambiguity and migration work, and willing to both set standards and reset a printer.</p>\n</li>\n\n</div>"}],"salaryRange":{"min":65000,"max":80000,"currency":"EUR","interval":"per-year-salary"},"text":"System Administrator","country":"DE","workplaceType":"onsite","opening":"","openingPlain":"","descriptionBody":"<div>Mythic is building the future of AI computing with breakthrough analog technology that delivers 100x the performance of traditional digital systems at the same power and cost. Our Hannover team, videantis GmbH, brings deep computer vision and video processing expertise to that mission, and we are hiring a System Administrator to be the IT and infrastructure owner on the ground there. You will keep a highly technical engineering site running day to day, covering servers, network, storage, endpoints, corporate applications, licenses and user support, while leading the local side of a substantial integration program that brings Hannover onto Mythic's global identity, collaboration, source control and security standards. This is a broad, hands-on role with real autonomy: you are the site's IT function, backed by a global IT and DevOps team in the US that you will work with daily. You will report to Mythic's Director of IT &amp; DevOps and partner closely with the Managing Director of videantis GmbH.</div>","descriptionBodyPlain":"","hostedUrl":"https://jobs.lever.co/mythic-ai.com/1c440df0-1f89-46b2-a6bb-8526d4018a08","applyUrl":"https://jobs.lever.co/mythic-ai.com/1c440df0-1f89-46b2-a6bb-8526d4018a08/apply"},{"additionalPlain":"","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Marketing & Sales","location":"Palo Alto, CA","team":"Marketing","allLocations":["Palo Alto, CA"]},"createdAt":1785173381351,"descriptionPlain":"","description":"<div>\n<p>Mythic, the leader in energy-efficient high-performance AI computing spanning from the edge to the datacenter, is hiring its first VP of Marketing. This role encompasses&nbsp; marketing end-to-end — from brand and category narrative through social and web, to the collateral, direct marketing, events and tools that close deals — across four very different buyer worlds: hyperscalers and data center architects, automotive OEMs and Tier 1s, robotics and defense primes, and their respective channels. This is a builder's role: you're standing up the function from scratch — starting with a small team then rapidly hiring and scaling a full marketing operation (brand, product marketing, comms, media relations, demand gen, events, sales enablement) as the business grows — and will personally shape everything from how Mythic defines its category to what a sales rep hands a customer in the room.</p>\n<p>You'll need to flex message and channel by vertical, with technical credibility, while keeping one coherent brand and technical narrative underneath it all.&nbsp;</p>\n</div>","id":"693eeeae-837c-493e-a7e1-c98aa76fa293","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p><strong>Brand &amp; Narrative:</strong> Own overall brand strategy, category positioning, and corporate communications/PR — establishing analog compute-in-memory as the efficient alternative to GPUs with one coherent narrative that stretches across data center, automotive, robotics, and defense.</p>\n</li>\n<li>\n<p><strong>Product &amp; Vertical Marketing:</strong> Translate Mythic's technical differentiation into distinct positioning, proof points, and co-marketing plans for each vertical — data center, automotive, robotics, and defense — in partnership with the CEO and BD leadership.</p>\n</li>\n<li>\n<p><strong>Demand Gen &amp; Sales Enablement:</strong> Build the full-funnel demand engine and own sales enablement end-to-end — battlecards, ROI/TCO tools, case studies, and vertical-specific playbooks — so sales and BD can win against GPUs and competing ASICs in every market.</p>\n</li>\n<li>\n<p><strong>Team &amp; Operations:</strong> Build the marketing organization from the ground up, defining the hiring plan and rapidly recruiting and scaling a full team across brand, product marketing, comms, demand gen, and sales enablement while representing Mythic at industry events, with press, and with industry, tech and financial analysts.</p>\n</li>\n\n</div>"},{"text":"What you'll bring ","content":"<div>\n\n<li>\n<p>15+ years of marketing experience in semiconductor, AI infrastructure, or deep-tech hardware — ideally including a stint at a company like NVIDIA, Qualcomm, Intel, Arm, or a comparable silicon/infrastructure player.</p>\n</li>\n<li>\n<p>Demonstrated range across at least two of Mythic's core verticals — data center/hyperscale, automotive, robotics/industrial, or defense/government — and the judgment to know how positioning, channels, and buyers differ across them.</p>\n</li>\n<li>\n<p>True end-to-end, hands-on experience: you've owned brand and category strategy, product marketing, demand gen, and sales enablement, not just one slice of the funnel — equally comfortable writing a brand narrative and building a competitive battlecard.</p>\n</li>\n<li>\n<p>Direct experience building a marketing team at a startup and rapidly scaling it — hiring the first several marketers, standing up the function's processes, and expanding headcount.</p>\n</li>\n<li>\n<p>Proven ability to build a category narrative from scratch, particularly one that needs to explain a genuinely new architecture.</p>\n</li>\n<li>\n<p>Strong written and verbal storyteller; able to operate as Mythic's de facto external voice alongside the CEO.</p>\n</li>\n<li>\n<p>Experience with high-stakes corporate communications, including funding rounds, strategic partnerships, and executive positioning, as well as internal comms and crisis comms.</p>\n</li>\n<li>\n<p>Comfortable in a fast-moving, resource-constrained environment where you'll do strategic and hands-on work in the same week.</p>\n</li>\n\n</div>"}],"salaryRange":{"min":220000,"max":320000,"currency":"USD","interval":"per-year-salary"},"text":"VP, Marketing","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>Mythic, the leader in energy-efficient high-performance AI computing spanning from the edge to the datacenter, is hiring its first VP of Marketing. This role encompasses&nbsp; marketing end-to-end &mdash; from brand and category narrative through social and web, to the collateral, direct marketing, events and tools that close deals &mdash; across four very different buyer worlds: hyperscalers and data center architects, automotive OEMs and Tier 1s, robotics and defense primes, and their respective channels. This is a builder's role: you're standing up the function from scratch &mdash; starting with a small team then rapidly hiring and scaling a full marketing operation (brand, product marketing, comms, media relations, demand gen, events, sales enablement) as the business grows &mdash; and will personally shape everything from how Mythic defines its category to what a sales rep hands a customer in the room.</p>\n<p>You'll need to flex message and channel by vertical, with technical credibility, while keeping one coherent brand and technical narrative underneath it all.&nbsp;</p>\n</div>","descriptionBodyPlain":"","hostedUrl":"https://jobs.lever.co/mythic-ai.com/693eeeae-837c-493e-a7e1-c98aa76fa293","applyUrl":"https://jobs.lever.co/mythic-ai.com/693eeeae-837c-493e-a7e1-c98aa76fa293/apply"},{"additionalPlain":"At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.\nMythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.\n","additional":"<div>\n<p>At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.</p>\n<p>Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.</p>\n</div>","categories":{"commitment":"Full-time","department":"Software","location":"Palo Alto, CA","team":"System Software","allLocations":["Palo Alto, CA"]},"createdAt":1785172528995,"descriptionPlain":"Mythic, the leader in energy-efficient high-performance AI computing spanning from the edge to the datacenter, is hiring a VP of Systems Engineering to own the path from silicon to shipping platforms. This is the role that turns Mythic's analog compute chips into reliable, validated, customer-ready systems — cards, modules, and reference platforms that OEMs and hyperscale partners can integrate with confidence. You'll build and lead the team responsible for hardware/software co-validation, platform bring-up, and system-level performance and reliability. You will be the technical bridge between chip design, firmware/software, and the customers deploying Mythic solutions in the field.\n","description":"<div>\n<p>Mythic, the leader in energy-efficient high-performance AI computing spanning from the edge to the datacenter, is hiring a VP of Systems Engineering to own the path from silicon to shipping platforms. This is the role that turns Mythic's analog compute chips into reliable, validated, customer-ready systems — cards, modules, and reference platforms that OEMs and hyperscale partners can integrate with confidence. You'll build and lead the team responsible for hardware/software co-validation, platform bring-up, and system-level performance and reliability. You will be the technical bridge between chip design, firmware/software, and the customers deploying Mythic solutions in the field.</p>\n</div>","id":"9368d3b2-34cb-48ba-8556-7e2b06ab193f","lists":[{"text":"What you'll do ","content":"<div>\n\n<li>\n<p>Own end-to-end systems engineering for Mythic's AMP-based products: post-silicon bring-up, platform/board-level validation, and characterization across the M1076 APU, PCIe cards, and M.2 modules.</p>\n</li>\n<li>\n<p>Build and scale the systems engineering team as Mythic grows from single-chip products to multi-card and rack-scale deployments.</p>\n</li>\n<li>\n<p>Drive hardware/software co-validation with firmware, compiler, and applications teams to ensure silicon performance claims (throughput, power, latency) hold up in real customer workloads.</p>\n</li>\n<li>\n<p>Serve as the primary technical escalation point for silicon and platform issues raised by customers and partners across robotics, automotive, defense, and data center.</p>\n</li>\n<li>\n<p>Own test infrastructure, automation, and characterization methodology to shorten the bring-up-to-production timeline for new silicon and card revisions.</p>\n</li>\n<li>\n<p>Feed field and validation learnings back into next-generation chip and system design with product and architecture teams.</p>\n</li>\n\n</div>"},{"text":"What you'll bring","content":"<div>\n\n<li>\n<p>12+ years in systems engineering, silicon bring-up, or platform validation, with progressively larger scope managing engineering teams.</p>\n</li>\n<li>\n<p>Direct experience taking chips from tape-out through post-silicon validation into shipping hardware products (cards, modules, or servers).</p>\n</li>\n<li>\n<p>Excellent technical grounding in the hardware/software boundary, board-level electrical debug, and reasoning about the compiler/firmware stack that sits on top of custom silicon.</p>\n</li>\n<li>\n<p>Proven track record building and scaling a systems or validation organization at a semiconductor or systems company.</p>\n</li>\n<li>\n<p>Experience supporting external customers or OEM partners through technical qualification and deployment of new silicon.</p>\n</li>\n<li>\n<p>Comfort operating in a startup environment — this role has less infrastructure and more ambiguity than the equivalent function at a large chip company, and requires building processes rather than inheriting them.</p>\n</li>\n<li>\n<p>Preferred experience with novel or non-standard compute architectures (analog, in-memory, or otherwise non-GPU AI accelerators).</p>\n</li>\n<li>\n<p>Preferred background at a large-scale systems engineering organization (e.g., NVIDIA, AMD, Qualcomm) in a bring-up/validation/platform role, with the judgment to know what to bring from that world and what to leave behind at Mythic's scale.</p>\n</li>\n<li>\n<p>Preferred familiarity with edge AI deployment environments — robotics, automotive, or defense — where power, size, and reliability constraints are as important as raw performance.</p>\n</li>\n\n</div>"}],"salaryRange":{"min":250000,"max":375000,"currency":"USD","interval":"per-year-salary"},"text":"VP, Systems Engineering","country":"US","workplaceType":"hybrid","opening":"","openingPlain":"","descriptionBody":"<div>\n<p>Mythic, the leader in energy-efficient high-performance AI computing spanning from the edge to the datacenter, is hiring a VP of Systems Engineering to own the path from silicon to shipping platforms. This is the role that turns Mythic's analog compute chips into reliable, validated, customer-ready systems &mdash; cards, modules, and reference platforms that OEMs and hyperscale partners can integrate with confidence. You'll build and lead the team responsible for hardware/software co-validation, platform bring-up, and system-level performance and reliability. You will be the technical bridge between chip design, firmware/software, and the customers deploying Mythic solutions in the field.</p>\n</div>","descriptionBodyPlain":"Mythic, the leader in energy-efficient high-performance AI computing spanning from the edge to the datacenter, is hiring a VP of Systems Engineering to own the path from silicon to shipping platforms. This is the role that turns Mythic's analog compute chips into reliable, validated, customer-ready systems — cards, modules, and reference platforms that OEMs and hyperscale partners can integrate with confidence. You'll build and lead the team responsible for hardware/software co-validation, platform bring-up, and system-level performance and reliability. You will be the technical bridge between chip design, firmware/software, and the customers deploying Mythic solutions in the field.\n","hostedUrl":"https://jobs.lever.co/mythic-ai.com/9368d3b2-34cb-48ba-8556-7e2b06ab193f","applyUrl":"https://jobs.lever.co/mythic-ai.com/9368d3b2-34cb-48ba-8556-7e2b06ab193f/apply"}]